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S32K310 bảng dữ liệu(PDF) 88 Page - NXP Semiconductors

tên linh kiện S32K310
Giải thích chi tiết về linh kiện  Supports S32K344, S32K324, S32K314, S32K312, S32K341 and S32K342. Data is preliminary for S32K311, S32K310, S32K328, S32K338, S32K348, S32K358 and S32K388
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Table 34. Low Power Comparator (LPCMP) (continued)
Symbol
Description
Min
Typ
Max
Unit
Condition
Spec
Number
VAHYST0
Analog Comparator
Hysteresis, Low
Speed mode
—
0
—
mV
HYSTCTR[1:0]= 2'b00 —
VAHYST1
Analog Comparator
Hysteresis, Low
Speed mode
—
8
60
mV
HYSTCTR[1:0]= 2'b01 —
VAHYST2
Analog Comparator
Hysteresis, Low
Speed mode
—
15
113
mV
HYSTCTR[1:0]= 2'b10 —
VAHYST3
Analog Comparator
Hysteresis, Low
Speed mode
—
23
165
mV
HYSTCTR[1:0]= 2'b11 —
INL
DAC integral
linearity 1, 6, 7
-1
—
1
LSB
vrefh_cmp = vdda,
vrefl_cmp = vss
—
INL
DAC integral
linearity 1, 6, 7
-1.5
—
1.5
LSB
vrefh_cmp < vdda
—
DNL
DAC differential
linearity 1, 6
-1
—
1
LSB
vrefh_cmp = vdda,
vrefl_cmp = vss
—
DNL
DAC differential
linearity 1, 6
-1.5
—
1.5
LSB
vrefh_cmp < vdda
—
tDDAC
DAC Initialization
and switching
settling time
—
—
30
us
—
—
VAIN
Analog input voltage 0
—
VDDA
V
—
—
1. vdda is comparator HV supply and internally shorted to VDD_HV_A pin. vss is comparator ground
2. Difference at input > 200mV
3. Applied +/- (100 mV + VAHYST0/1/2/3 + max. of VAIO) around switch point
4. Applied +/- (30 mV + 2 x VAHYST0/1/2/3 + max. of VAIO) around switch point
5. Applied ± (100 mV + VAHYST0/1/2/3 ).
6. 1 LSB = (vrefh_cmp - vrefl_cmp) /256. vrefh_cmp and vrefl_cmp are comparator reference high and low
7. Calculation method used: Linear Regression Least Square Method
For Comparator IN signals adjacent to VDD_HV_A/VDD_HV_B/VSS or XTAL/EXTAL or switching pins cross coupling may
happen and hence hysteresis settings can be used to obtain the desired Comparator performance. Additionally an external
capacitor to ground (1nF) should be used to filter noise on input signal. Also source drive should not be weak (Signal with <50K
pull up/down is recommended).
For devices where the VDD_HV_B domain is present, ACMP0 channels must only be selected/enabled when VDD_HV_A >=
VDD_HV_B. These channels must be disabled when VDD_HV_A goes below VDD_HV_B.
NXP Semiconductors
Analog modules
S32K3xx Data Sheet, Rev. 5.2, 10/2022
Data Sheet: Technical Data
Preliminary Information
88 / 137



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