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S32K310 bảng dữ liệu(PDF) 72 Page - NXP Semiconductors |
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S32K310 bảng dữ liệu(HTML) 72 Page - NXP Semiconductors |
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72 / 137 page ![]() 6. I/O timing specifications are valid for the un-terminated transmission line reference load given in the figure below. A lumped 8pF load is assumed at the end of a 5 inch microstrip trace on standard FR4 with approximately 1.5pF/inch (25pF total with margin). For signals with frequency greater than 63MHz, a maximum 2 inch PCB trace is assumed. 7. To determine total switching current on any I/O supply, current values per output pin should not be incrementally summed. I/O interfaces on the device are asynchronous to each other, so not all switching occurs at the same instant. Actual use case must be considered. RDSON RPCB = RDSON PCB External device MCUsee note 1 RDSON 5 in. (4 layer FR4) CPCB = ~1.5 pF/inch * 5 inch = ~7.5 pF CL = 8 pF 1. See IBIS models for further details. Notes: Figure 28. Reference Load Diagram 7.2 GPIO DC electrical specifications, 5.0V (4.5V - 5.5V) The leakage current on the GPIO pins is specified as a function of the pad type (Standard, Standard Plus, Medium, Fast, or GPI) and the number of Analog functions (CMP and ADC channels) multiplexed per pin. For S32K388, see the ILKG column in the Pinout section of the IOMUX file attached to the Reference Manual. For other devices, the "Analog Function Count" is defined from the number of CMP and ADC channels multiplexed to a given pin. This information can be obtained from the "Direct Signals" column in the IOMUX files attached to the Reference Manual. The "Analog Function Count" is shown in the Condition column of the following table. Table 22. GPIO DC electrical specifications, 5.0V (4.5V - 5.5V) Symbol Description Min Typ Max Unit Condition Spec Number VIH Input high level DC voltage threshold 0.65 x VDD_HV _A/B — VDD_HV _A/B + 0.3 V VDD_HV_A/B = 5.0V — VIL Input low level DC voltage threshold VSS - 0.3 — 0.35 x VDD_HV _A/B V VDD_HV_A/B = 5.0V — WFRST RESET Input filtered pulse width 1 — — 33 ns — — WNFRST RESET Input not filtered pulse width 2 100 — — ns — — ILKG_50_S0 5.0V input leakage current for Standard GPIO 3 -250 — 800 nA Pins with Analog Function Count = 0 — ILKG_50_S1 5.0V input leakage current for Standard GPIO 3 -1300 — 1100 nA Pins with Analog Function Count = 1 — Table continues on the next page... NXP Semiconductors I/O parameters S32K3xx Data Sheet, Rev. 5.2, 10/2022 Data Sheet: Technical Data Preliminary Information 72 / 137 |
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