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VR4102 bảng dữ liệu(PDF) 106 Page - NEC

tên linh kiện VR4102
Giải thích chi tiết về linh kiện  64/32-bit Microprocessor
PDF  701 Pages
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nhà sản xuất  NEC [NEC]
Trang chủ  http://www.nec.com/
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VR4102 bảng dữ liệu(HTML) 106 Page - NEC

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CHAPTER 4 VR4102 PIPELINE
106
(4) Trap if Less Than instruction (TLT rs, rt)
IF stage
Same as the IF stage for the ADD instruction.
RF stage
Same as the RF stage for the ADD instruction.
EX stage
ALU controls are set to do an A – B operation. The operands flow into the ALU inputs, and the
ALU operation is started. The result of the ALU operation is latched into the ALU output latch
during
)1. The sign bits of operands and of the ALU output latch are checked to determine if a
less than condition is true. If this condition is true, a Trap exception occurs. The value in the PC
register is used as an exception vector value, and from now on any instruction will be invalid.
DC stage
No operation
WB stage
The EPC register is loaded with the value of the PC if the less than condition was met in the EX
stage. The Cause register ExCode field and BD bit are updated appropriately, as is the EXL bit
of the Status register. If the less than condition was not met in the EX stage, no activity occurs in
the WB stage.
Figure 4-8. TLT Instruction Pipeline Activities
IF1
Cycle
Phase
PCycle
PClock
IF2
)2
)1
)2
)1
)2
)1
)2
)1
)2
)1
RF1
RF2
EX1
EX2
DC1
DC2
WB1
WB2
ITLB
IDC
ITC
ICA
IDEC
EX
RF



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