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VR4102 bảng dữ liệu(PDF) 48 Page - NEC

tên linh kiện VR4102
Giải thích chi tiết về linh kiện  64/32-bit Microprocessor
PDF  701 Pages
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nhà sản xuất  NEC [NEC]
Trang chủ  http://www.nec.com/
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VR4102 bảng dữ liệu(HTML) 48 Page - NEC

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CHAPTER 1 INTRODUCTION
48
Figure 1-6. Little-Endian Byte Ordering in Double Word Data
16
23
0
31
32
87
63
8
0
Lower
address
Higher
address
Double word
address
Half word
22
15
14
7
6
21
20
13
12
5
4
19
18
11
10
3
2
17
16
9
8
1
0
16 15
Word
Byte
Remarks 1. The lowest byte is the lowest address.
2. The address of word data is specified by the lowest byte’s address.
The CPU uses following byte boundaries for halfword, word, and doubleword accesses:
— Halfword: An even byte boundary (0, 2, 4...)
— Word: A byte boundary divisible by four (0, 4, 8...)
— Doubleword: A byte boundary divisible by eight (0, 8, 16...)
The following special instructions to load and store data that are not aligned on 4-byte (word) or 8-byte
(doubleword) boundaries:
LWL
LWR
SWL
SWR
LDL
LDR
SDL
SDR
These instructions are used in pairs to provide an access to misaligned data. Accessing misaligned data incurs
one additional instruction cycle over that required for accessing aligned data.
Figure 1-7 shows the access of a misaligned word that has byte address 3 for the little-endian conventions.
Figure 1-7. Misaligned Word Accessing (Little-Endian)
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6
4
0
15
16
8
23
24
7
31
3
Lower
address
Higher
address
Bit No.



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