VR4102 datasheet(30/701 Pages) NEC

30 / 701 page

CHAPTER 1 INTRODUCTION

a External input clock: 32.768 kHz, 18.432 MHz (for internal CPU core and peripheral unit operation), 48 MHz

(dedicated for FIR IrDA interface)

a Supports ISA bus subset

a Clock supply management function for each on-chip peripheral unit to implement low-power consumption

a Operation supply voltage: VDD = 3.0 to 3.6 V

1.2 ORDERING INFORMATION

Part Number

Package

Maximum Operation Frequency

µPD30102GM-54-8EV

216-pin plastic LQFP (fine pitch) (24

× 24 mm)

54 MHz

µPD30102GM-66-8EV

216-pin plastic LQFP (fine pitch) (24

× 24 mm)

66 MHz

µPD30102S1-54-3C

224-pin plastic FBGA (16

× 16 mm)

54 MHz

µPD30102S1-66-3C

224-pin plastic FBGA (16

× 16 mm)

66 MHz

1.3 64-BIT ARCHITECTURE

The VR4102 microprocessor has a 64-bit architecture. However, it can also run 32-bit applications.

1.4 VR4102 PROCESSOR

The VR4102 consists of the VR4100 CPU core and seventeen peripheral units. It can connect external controllers

directly.

Figure 1-1 is an internal block diagram of the VR4102 processor.

Figure 1-1. VR4102 Internal Block Diagram and Example of Connection to External Blocks

48MHz

VR4100 CPU core

BCU

DMAAU

PMU

ICU

DSU

RTC

CMU

PIU

KIU

GIU

AIU

SIU

OSB

RS-232-C

Driver

LCD Module

PCMCIA

/Buffer

VR4102

32.768kHz

LCD Panel

µPD16661

Touch Panel

EDO DRAM

PCcard

A/D

D/A

HSP

CODEC

AFE

18.432MHz

PLL

Driver

FIR

DCU

LED

ROM/

Flash memory

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