TNETV2501INPGF datasheet(141/197 Pages) TI1

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Electrical Specifications

141

December 2002 − Revised November 2008

SPRS206K

The recommended ESR is presented as a maximum, and theoretically, a crystal with a lower maximum ESR

might seem to meet these specifications. However, it is recommended that crystals with actual maximum ESR

specifications as shown in Table 5−1 be used since this will result in maximum crystal performance reliability.

5.6.2 Layout Considerations

Since parasitic capacitance, inductance, and resistance can be significant in this and any circuit, good PC

board layout practices should always be observed when planning trace routing to the discrete components

used in this oscillator circuit. Specifically, the crystal and the associated discrete components should be

located as close to the DSP as physically possible. Also, X1 and X2/CLKIN traces should be separated as soon

as possible after routing away from the DSP to minimize parasitic capacitance between them, and a ground

trace should be run between these two signal lines. This also helps to minimize stray capacitance between

these two signals.

TNETV2501INPGF bảng dữ liệu(PDF) 141 Page - Texas Instruments