TNETV2501INPGF datasheet(50/197 Pages) TI1

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Functional Overview

December 2002 − Revised November 2008

SPRS206K

3.4

Timers

The 5501 has four 64-bit timers: Timer 0, Timer 1, Watchdog Timer (WDT), and Timer 3. The first two timers,

Timer 0 and Timer 1, are mainly used as general-purpose timers. The third timer, the Watchdog Timer, can

be used as either a general-purpose timer or a watchdog timer. The fourth timer is reserved as a DSP/BIOS

counter; users have no access to this timer.

Each timer has one input, one output, and one interrupt signal: TIN, TOUT, and TINT, respectively. Timer 0,

Timer 1, and the Watchdog Timer are each assigned a pin: TIM0 pin is assigned to Timer 0, TIM1 is assigned

to Timer 1, and NMI/WDTOUT is used by the Watchdog Timer. The input (TIN) or output (TOUT) signal of

Timer 0, Timer 1, and the Watchdog Timer can be connected to their respective pins via the Timer Signal

Selection Register (TSSR).

The DSP/BIOS timer input, output, and interrupt signals are not internally connected. No interrupts are needed

from this timer; therefore, the timer interrupt signal is not internally connected to the CPU interrupt logic.

The interrupt signal (TINT) of the Watchdog Timer can be internally connected to the NMI, RESET, and INT3

signals via the TSSR.

Note that the NMI/WDTOUT pin has a dual function: Watchdog Timer pin and NMI input pin. The function of

the NMI/WDTOUT pin can be selected through the TSSR.

For more information on the 5501 timers, see the TMS320VC5501/5502 DSP Timers Reference Guide

(literature number SPRU618).

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