TNETV2501INPGF datasheet(145/197 Pages) TI1

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Electrical Specifications

145

December 2002 − Revised November 2008

SPRS206K

5.6.5 EMIF Clock Options

Table 5−6 through Table 5−8 assume testing over recommended operating conditions (see Figure 5−5

through Figure 5−7).

Table 5−6. EMIF Timing Requirements for ECLKIN†‡

NO.

MIN

MAX

UNIT

tc(EKI)

Cycle time, ECLKIN

16P

tw(EKIH)

Pulse duration, ECLKIN high

0.4 * tc(EKI)

tw(EKIL)

Pulse duration, ECLKIN low

0.4 * tc(EKI)

E10

tt(EKI)

Transition time, ECLKIN

† P = 1/CPU clock frequency in ns. For example, when running parts at 300 MHz, use P = 3.33 ns.

‡ The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN.

Table 5−7. EMIF Switching Characteristics for ECLKOUT1§¶#

NO.

PARAMETER

MIN

MAX

UNIT

tc(EKO1)

Cycle time, ECLKOUT1

E − 1

E + 1

tw(EKO1H)

Pulse duration, ECLKOUT1 high

EH − 1

EH + 1

tw(EKO1L)

Pulse duration, ECLKOUT1 low

EL − 1

EL + 1

tt(EKO1)

Transition time, ECLKOUT1

td(EKIH-EKO1H)

Delay time, ECLKIN high to ECLKOUT1 high

td(EKIL-EKO1L)

Delay time, ECLKIN low to ECLKOUT1 low

§ The reference points for the rise and fall transitions are measured at VOL MAX and VOH MIN.

¶ E = the EMIF input clock (CPU clock, CPU/2 clock, or CPU/4 clock) period in ns for EMIF.

# EH is the high period of E (EMIF input clock period) in ns and EL is the low period of E (EMIF input clock period) in ns for EMIF.

ECLKIN

E10

Figure 5−5. ECLKIN Timings for EMIF

ECLKIN

ECLKOUT1

Figure 5−6. ECLKOUT1 Timings for EMIF Module

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