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LAN91C111 bảng dữ liệu(PDF) 71 Page - Microchip Technology |
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LAN91C111 bảng dữ liệu(HTML) 71 Page - Microchip Technology |
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71 / 125 page ![]() LAN91C111 DS00002276A-page 72 2011-2016 Microchip Technology Inc. 9.4.4 T4 - 100BASE-T4 A '1' indicates the PHY is capable of 100BASE-T4 9.4.5 TX_FDX - 100BASE-TX FULL DUPLEX CAPABLE A '1' indicates the PHY is capable of 100BASE-TX Full Duplex 9.4.6 TX_HDX - 100BASE-TX HALF DUPLEX CAPABLE A '1' indicates the PHY is capable of 100BASE-TX Half Duplex 9.4.7 10_FDX - 10BASE-T FULL DUPLEX CAPABLE A '1' indicates the PHY is capable of 10BASE-T Full Duplex 9.4.8 10_HDX - 10BASE-T HALF DUPLEX CAPABLE A '1' indicates the PHY is capable of 10BASE-T Half Duplex The management entity sets the value of this field prior to Auto-Negotiation. ‘1’ in these bit indicates that the mode of operation that corresponds to these will be acceptable to be auto-negotiated to. Only modes supported by the PHY can be set. 9.4.9 CSMA A '1' indicates the PHY is capable of 802.3 CSMA Operation. 9.5 Register 5. Auto-Negotiation Remote End Capability Register The bit definitions are analogous to the Auto-Negotiation Advertisement Register. 9.6 Register 16. Configuration 1- Structure and Bit Definition NP ACK RF Reserved Reserved Reserved T4 TX_FDX RR R R R R R R 00 0 0 0 0 0 0 TX_HDX 10_FDX 10_HDX Reserved Reserved Reserved Reserved CSMA RR R R R R R R 00 0 0 0 0 0 0 LNKDIS XMTDIS XMTPDN Reserved Reserved BYPSCR UNSCDS EQLZR RW RW RW RW RW RW RW RW 00 0 0 0 0 0 0 CABLE RLVL0 TLVL3 TLVL2 TLVL1 TLVL0 TRF1 TRF0 RW RW RW RW RW RW RW RW 00 1 0 0 0 1 0 |
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