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LAN91C111 bảng dữ liệu(PDF) 25 Page - Microchip Technology |
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LAN91C111 bảng dữ liệu(HTML) 25 Page - Microchip Technology |
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25 / 125 page ![]() 2011-2016 Microchip Technology Inc. DS00002276A-page 25 LAN91C111 7.7.5 SCRAMBLER 7.7.5.1 100 Mbps 100BASE-TX requires scrambling to reduce the radiated emissions on the twisted pair. The LAN91C111 scrambler takes the encoded data from the 4B5B encoder, scrambles it per the IEEE 802.3 specifications, and sends it to the TP transmitter. 7.7.5.2 10 Mbps A scrambler is not used in 10Mbps mode. 7.7.5.3 Scrambler Bypass The scrambler can be bypassed by setting the bypass scrambler/descrambler bit in the PHY Ml serial port Configuration 1 register. When this bit is set, the 5B data bypasses the scrambler and goes directly from the 4B5B encoder to the twisted pair transmitter. 7.7.6 DESCRAMBLER 7.7.6.1 100 Mbps The LAN91C111 descrambler takes the scrambled data from the data recovery block, descrambles it per the IEEE 802.3 specifications, aligns the data on the correct 5B word boundaries, and sends it to the 4B5B decoder. The algorithm for synchronization of the descrambler is the same as the algorithm outlined in the IEEE 802.3 specifica- tion. Once the descrambler is synchronized, it will maintain synchronization as long as enough descrambled idle pattern 1's are defected within a given interval. To stay in synchronization, the descrambler needs to detect at least 25 consec- utive descrambled idle pattern 1's in a 1ms interval. If 25 consecutive descrambled idle pattern 1's are not detected within the 1ms interval, the descrambler goes out of synchronization and restarts the synchronization process. If the descrambler is in the unsynchronized state, the descrambler loss of synchronization detect bit is set in the Ml serial port Status Output register to indicate this condition. Once this bit is set, it will stay set until the descrambler achieves synchronization. 7.7.6.2 10 Mbps A descrambler is not used in 10 Mbps mode. 7.7.6.3 Descrambler Bypass The descrambler can be bypassed by setting the bypass scrambler/descrambler bit in the PHY MI serial port Configu- ration 1 register. When this bit is set, the data bypasses the descrambler and goes directly from the TP receiver to the 4B5B decoder. 7.7.7 TWISTED PAIR TRANSMITTER 7.7.7.1 Transmitter - 100 Mbps The TX transmitter consists of MLT-3 encoder, waveform generator and line driver. The MLT-3 encoder converts the NRZ data from the scrambler into a three level MLT-3 code required by IEEE 802.3. MLT-3 coding uses three levels and converts 1's to transitions between the three levels, and converts 0's to no transi- tions or changes in level. The purpose of the waveform generator is to shape the transmit output pulse. The waveform generator takes the MLT- 3 three level encoded waveform and uses an array of switched current sources to control the rise/fall time and level of the signal at the Output. The output of the switched current sources then goes through a low pass filter in order to "smooth" the current output and remove any high frequency components. In this way, the waveform generator pre- shapes the output waveform transmitted onto the twisted pair cable to meet the pulse template requirements outlined in IEEE 802.3. The waveform generator eliminates the need for any external filters on the TP transmit output. The line driver converts the shaped and smoothed waveform to a current output that can drive 100 meters of category 5 unshielded twisted pair cable or 150 Ohm shielded twisted pair cable. |
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