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LAN91C111 bảng dữ liệu(PDF) 47 Page - Microchip Technology

tên linh kiện LAN91C111
Giải thích chi tiết về linh kiện  10/100 Non-PCI Ethernet Single Chip MAC PHY
PDF  125 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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LAN91C111 bảng dữ liệu(HTML) 47 Page - Microchip Technology

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 2011-2016 Microchip Technology Inc.
DS00002276A-page 47
LAN91C111
LS2A, LS1A, LS0A – LED select Signal Enable. These bits define what LED control signals are routed to the LEDA
output pin on the LAN91C111 Ethernet Controller. The default is 10/100 Link detected.
What do you
want to do?
Auto-Negotiation
Control Bits
Speed and Duplex Mode Control for the PHY
Duplex
Mode
Control for
the MAC
Try to Manually
Set to ……
ANEG
Bit
ANEG_EN
Bit
SPEED
Bit
DPLX
Bit
SPEED
Bit
DPLX
Bit
SWFDUP
Bit
RPCR
(MAC
Bank 0
Offset A)
Register 0
(PHY)
RPCR
(MAC
Bank 0
Offset A)
RPCR
(MAC
Bank 0
Offset A)
Register 0
(PHY)
Register 0
(PHY)
Transmit
Control
Register
(MAC)
100 Full Duplex
0
0
1
1
X
X
1
01
1
1
X
X
1
10
X
X
1
1
1
100 Half Duplex
0
0
1
0
X
X
0
01
1
0
X
X
0
10
X
X
1
0
0
10 Full Duplex
0
0
0
1
X
X
1
01
0
1
X
X
1
10
X
X
0
1
1
10 Half Duplex
0
0
0
0
X
X
0
01
0
0
X
X
0
10
X
X
0
0
0
LS2A
LS1A
LS0A
LED Select Signal – LEDA
0
0
0
nPLED3+ nPLED0 – Logical OR of 100Mbps Link detected 10Mbps Link detected
(default)
0
0
1
Reserved
0
1
0
nPLED0 - 10Mbps Link detected
0
1
1
nPLED1 - Full Duplex Mode enabled
1
0
0
nPLED2 - Transmit or Receive packet occurred
1
0
1
nPLED3 - 100Mbps Link detected
1
1
0
nPLED4 - Receive packet occurred
1
1
1
nPLED5 - Transmit packet occurred



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