| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
PC87591L bảng dữ liệu(PDF) 228 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
PC87591L bảng dữ liệu(HTML) 228 Page - National Semiconductor (TI) |
|
228 / 437 page ![]() Embedded Controller Modules (Continued) www.national.com 228 Revision 1.07 JTAG-Initiated Accesses JTAG-initiated accesses for both read and write is restricted based on the value held in the Flash Contents Protect field of the protection word. When any bit in the Flash Contents Protect field is 0, no reads or writes are allowed. In OBD or DEV environment, the device remains reset until a special erase is performed. The only operation allowed in this case is a special erase of the flash con- tents. When all bits in the Flash Contents Protect field are 1, all flash operations are allowed. The entire flash may be read, and except for the Factory Parameters page Of the Information Block, the entire flash may be erased and programed. Parallel Flash Interface-Initiated Accesses Parallel Flash interface-initiated accesses are subject to the same protection scheme as JTAG-initiated accesses. When any bit in the Flash Contents Protect field is 0, only special erase operations are allowed and all other flash access opera- tions are ignored. See also Section 4.16.5 on page 226. 4.16.7 Flash Interface Registers For a summary of the abbreviations used for Register Type, see “Register Abbreviations and Access” on page 34. Information Block Access Index Register (IBAI) This register defines the address bits 7-0 for read or write transaction to the Information Block. Location: 00 F88016 Type: R/W Table 34. Flash Interface Register Map Mnemonic Register Name Type IBAI Information Block Access Index R/W IBD Information Block Data R/W FCWP0 Flash Core Write Protect R/W FLCR Flash Memory Control R/W FLSR Flash Memory Status R/W1C FLPSLR Flash Memory Pre-Scaler R/W FLSTART Flash Memory Start Time R/W FLTRAN Flash Memory Transition Time R/W FLPROG Flash Memory Program Time R/W FLPERASE Flash Memory Page Erase Time R/W FLSERASE Flash Memory Section Erase Time R/W FLEND Flash Memory End Time R/W FLSEND Flash Memory Section Erase End Time R/W FLRCV Flash Memory Recovery Time R/W Bit 15 14 13 12 11 10 9876543210 Name Reserved Indirect Memory Address 7-0 Bit Description 7-0 Index Address 7-0. The address is of a byte address in the flash Information Block. Access to words is allowed only to word-aligned addresses. 15-8 Reserved. |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |