PC87591L datasheet(84/437 Pages) NSC

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4.0 Embedded Controller Modules (Continued)

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Revision 1.07

I/O Zone Conﬁguration Register (IOCFG)

The IOCFG register controls the configuration of the I/O zone. On reset, it is initialized to 069F16.

Location: 00 F98216

Type: R/W

Bit

9876543210

Name

Reserved

IPST

Res

Reserved

HOLD

WAIT

Reset

0000011010011111

Bit

Description

2-0

WAIT. Number of TIW clock cycles that extend the bus cycle.

Bits

2 1 0

Number

0 0 0:

None

0 0 1:

One

0 1 0:

Two

0 1 1:

Three

1 0 0:

Four

1 0 1:

Five

1 1 0:

Six

1 1 1:

Seven

4-3

HOLD. Number of Thold clock cycles.

Bits

4 3

Number

0 0:

None

0 1:

One

1 0:

Two

1 1:

Three

6-5

Reserved.

Bus Width. Sets the external bus width used for the I/O zone. It is initialized during reset to its default value.

0: 8-bit bus

1: 16-bit bus (default)

Reserved.

IPST (Idle After Bus Cycle). Determines if an idle cycle follows the current bus cycle when the next bus cycle

is in a different zone.

0: No idle cycle inserted

1: Idle cycle inserted

15-10 Reserved.

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