PC87591L datasheet(54/437 Pages) NSC

54 / 437 page

2.0 Signal/Pin Description and Configuration (Continued)

www.national.com

Revision 1.07

Strap Pin Status Register (STRPST)

The STRPST register is a byte-wide, read-only register. It enables the software to read the value set to strap pins during

Power-Up reset. STRPST bits provide the value of their respective strap input. See Table 7 for bit details.

Location: 00 FF1216

Type: RO

Reset Value: According to external straps

2.4

ALTERNATE FUNCTIONS

2.4.1

GPIO with Alternate Functions

The PC87591x uses the GPIO port pins to multiplex functions, thereby maximizing the device’s flexibility. Table 8 lists all the

pins with such alternate functions and summarizes their selection criteria. To select alternate pin functions, strap inputs flash

memory and configuration registers are used as follows:

●

The ports’ Alternate Function Control register controls the IOPA, IOPB, IOPC, IOPD, IOPE and IOPF pins. Each of

the ports’ pins may be used as a GPIO port or its alternate function, based on the setting of the corresponding bit in

PxALT register.

●

The environment setting and MCFG bits control port IOPH, IOPI, IOPJ, IOPK, IOPL and IOPM pins. In IRE and OBD

environments, these pins may function either as GPIO or their alternate function (as indicated in the table). In DEV

environment, they all function as their alternate functions.

●

Interrupts may be enabled together with the use of the pin as input or with its alternate function when the alternate

function is an input. Enabling the interrupt input is done via the port’s alternate function or the respective bit in EICFG

●

Strap inputs and their associated internal pull-down resistor function during VCC Power-Up reset.

●

The Protection Word in the ﬂash conﬁgures the use of RESET2 input.

When a pin is used as GPIO and not as its alternate function, disable the alternate function in the relevant module’s register.

Note: In Table 8, the PKG column shows pins available in both 128- and 176-pin packages and pins available only in 176-

pin packages.

Bit

76543210

Name

Reserved

BADDR1

BADDR0

SHBM

Reset

Table 8. Alternate Function Selection

PKG

GPIO

Alternate Function 1

Alternate Function 2

128/176 Name

Type

Module

Signal Name

Select

Module

Signal Name

Select

128/176 IOPA0

I/O

PWM

PWM0

PAALT.0

128/176 IOPA1

I/O

PWM1

PAALT.1

128/176 IOPA2

I/O

PWM2

PAALT.2

128/176 IOPA3

I/O

PWM3

PAALT.3

128/176 IOPA4

I/O

PWM4

PAALT.4

128/176 IOPA5

I/O

PWM5

PAALT.5

128/176 IOPA6

I/O

PWM6

PAALT.6

128/176 IOPA7

I/O

PWM7

PAALT.7

128/176 IOPB0

I/O

USART

URXD

PBALT.0

128/176 IOPB1

I/O

UTXD

PBALT.1

128/176 IOPB2

I/O

USCLK

PBALT.2

128/176 IOPB3

I/O

ACCESS.bus

SCL1

PBALT.3

128/176 IOPB4

I/O

SDA1

PBALT.4

PC87591L bảng dữ liệu(PDF) 54 Page - National Semiconductor (TI)

PC87591L bảng dữ liệu(HTML) 54 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL