ATF280F_14 datasheet(38/107 Pages) ATMEL

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ATF280F [DATASHEET]

7750E

−AERO−05/12

Figure 5-10. ATF280F: Configuration Download in mode 1

[Run]: In Run lifephase, the multiplexed pin of the ATF280F are in their GPIO function and as configured by the already

loaded application. This lifephase is exiting to enter in Configuration Download as soon as the CON pin is driven to a

low logic level by an external master:

• M0, M1, M2: these signals remain inputs and are not used anymore (Mode is already sampled),

• CCLK: this signal is an input with pull-up and is not used,

• IO713_D0: this signal remains a User I/O,

• CON: this signal is released to a high logic level by the ATF280F itself,

• IO303_INIT: this signal remains a User I/O,

• IO259_LDC: this signal remains a User I/O,

• IO265_HDC: this signal remains a User I/O,

• IO547_CS0: this signal remains a User I/O,

• RESETN: this signal is an input which immediately reset the configuration logic to a Manual Reset lifephase.

[Configuration Download]: During the Configuration Download lifephase, the ATF280F starts to drive the signal

regarding configuration download interfaces, this lifephase starts when CON is lowered by an external master

component:

• M0, M1, M2: these signals remain inputs and are not used anymore,

• CCLK: this signal is an input and shall be provided by the external master component as clock source for the

serial EEPROM memory and the ATF280F. At each rising edge of CCLK, the EEPROM memory outputs a new

bit while the ATF280F senses the previous bit.

• IO713_D0: this signal is sampled by the FPGA at each rising edge of CCLK. It is the DATA ouput of the

EEPROM memory,

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