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ATF280F bảng dữ liệu(PDF) 76 Page - ATMEL Corporation

tên linh kiện ATF280F
Giải thích chi tiết về linh kiện  Rad-Hard Reprogrammable FPGA
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nhà sản xuất  ATMEL [ATMEL Corporation]
Trang chủ  http://www.atmel.com
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ATF280F bảng dữ liệu(HTML) 76 Page - ATMEL Corporation

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ATF280F [DATASHEET]
7750E
−AERO−05/12
76
13.2
TAP Architecture
The TAP implemented in the ATF280F consists in a TAP interface, a TAP controller and a number of shift registers
including an instruction register (IR) and some other registers.
Figure 13-2. AT697 TAP Architecture
13.2.1 TAP Instructions
The following instructions are supported by the TAP.
Table 13-2. TAP instruction set
Binary Value
Instruction Name
Data Register
Scan Chain Accessed
000
EXTEST
Boundary scan register
Boundary scan chain
001
SAMPLE/PRELOAD
Boundary scan register
Boundary scan chain
010
BYPASS
Bypass register
Bypass scan chain
111
IDCODE
Device id register
ID register scan chain
13.2.1.1 BYPASS
This instruction is binary coded "010"
It is used to speed up shifting at board level through components that are not to be activated.
13.2.1.2 EXTEST
This instruction is binary coded "000"
It is used to test connections between components at board level. Components output pins are controlled by boundary
scan register during Capture DR on the rising edge of TCK.
13.2.1.3 SAMPLE/PRELOAD
This instruction is binary coded "001"



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