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ATF280F bảng dữ liệu(PDF) 86 Page - ATMEL Corporation

tên linh kiện ATF280F
Giải thích chi tiết về linh kiện  Rad-Hard Reprogrammable FPGA
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ATF280F bảng dữ liệu(HTML) 86 Page - ATMEL Corporation

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ATF280F [DATASHEET]
7750E
−AERO−05/12
86
15.2
Pin Assignment
The core of the FPGA is supplied through VDD pins that are linked all together in a dedicated power cluster.
The ATF280F periphery is divided into 12 clusters. Eight clusters are dedicated to programmable I/Os and four clusters
are dedicated to LVDS. Each cluster consists in a set of I/O together with its dedicated power supply source. The
following tables summarized the pin assignment cluster by cluster.
The ground planes between core and periphery are linked together and are described as a “Gnd” cluster.
15.2.1 Core Power and Ground Cluster
Table 15-3. Core Power and Ground Cluster
Packages
Packages
Cluster
Pin Name
MCGA472/
MLGA472
MQFP256
MQFP352
Cluster
Pin Name
MCGA472/
MLGA472
MQFP256
MQFP352
Core
VDD
A3
122
184
Gnd
VSS
A4
121
183
Core
VDD
A20
72
258
Gnd
VSS
A19
Core
VDD
B3
Gnd
VSS
B2
71
257
Core
VDD
B20
58
272
Gnd
VSS
B21
Core
VDD
C1
Gnd
VSS
C3
271
Core
VDD
C2
Gnd
VSS
C20
Core
VDD
C21
8
346
Gnd
VSS
D1
7
345
Core
VDD
C22
Gnd
VSS
D22
Core
VDD
Y1
Gnd
VSS
W1
57
7
Core
VDD
Y2
250
8
Gnd
VSS
W22
249
Core
VDD
Y21
200
82
Gnd
VSS
Y3
199
81
Core
VDD
Y22
Gnd
VSS
Y20
Core
VDD
AA3
Gnd
VSS
AA2
185
95
Core
VDD
AA20
186
96
Gnd
VSS
AA21
Core
VDD
AB3
136
170
Gnd
VSS
AB4
135
169
Core
VDD
C2
Gnd
VSS
AB19



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