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TMP411D bảng dữ liệu(PDF) 36 Page - Texas Instruments |
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TMP411D bảng dữ liệu(HTML) 36 Page - Texas Instruments |
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36 / 60 page ![]() Bits 2 through 4 of the Resolution Register must always be set to 1. Bits 5 through 7 of the Resolution Register must always be set to 0. The power-on-reset value of this register is 1Ch. 8.8 Conversion Rate Register The Conversion Rate Register controls the rate at which temperature conversions are performed. This register adjusts the idle time between conversions but not the conversion timing, thereby allowing TMP411-Q1 and TMP411D-Q1 power dissipation to be balanced with the temperature register update rate. Table 8-5 shows the conversion rate options and corresponding current consumption. Table 8-5. Conversion Rate Register CONVERSION RATE REGISTER (Read = 04h, Write = 0Ah, POR = 08h) R7 R6 R5 R4 R3 R2 R1 R0 CONVERSIONS PER SECOND AVERAGE IQ (TYPICAL) (µA) TMP411-Q1 (Legacy chip) AVERAGE IQ (TYPICAL) (µA) TMP411-Q1 (New chip) TMP411D-Q1 V+ = 2.7V V+ = 5.5V V+ = 2.7V and 5.5V 0 0 0 0 0 0 0 0 0.0625 11 32 1.5 0 0 0 0 0 0 0 1 0.125 17 38 1.8 0 0 0 0 0 0 1 0 0.25 28 49 2.5 0 0 0 0 0 0 1 1 0.5 47 69 3.8 0 0 0 0 0 1 0 0 1 80 103 6.5 0 0 0 0 0 1 0 1 2 128 155 12 0 0 0 0 0 1 1 0 4 190 220 23 07h to 0Fh 8 373 413 45 8.9 N-factor Correction Register The TMP411-Q1 and TMP411D-Q1 allow for a different n-factor value to be used for converting remote channel measurements to temperature. The remote channel uses sequential current excitation to extract a differential VBE voltage measurement to determine the temperature of the remote transistor. Equation 1 relates this voltage and temperature. VBE2−VBE1=nkTq×ln I2I1 (1) The value n is a characteristic of the particular transistor used for the remote channel. The default value for the TMP411-Q1 and TMP411D-Q1 devices is n = 1.008. The value in the N-Factor Correction Register can be used to adjust the effective n-factor according to Equation 2 and Equation 3. neff= 1.008×300 300−NADJUST (2) NADJUST=300−300×1.008 neff (3) The n-correction value must be stored in two’s-complement format, yielding an effective data range from −128 to 127, as shown in Table 8-6. The n-correction value can be written to and read from pointer address 18h. The register power-on-reset value is 00h, which is not affected unless the value is written to. Table 8-6. N-Factor Range NADJUST N BINARY HEX DECIMAL 0111 1111 7F 127 1.747977 0000 1010 0A 10 1.042759 0000 1000 08 8 1.035616 0000 0110 06 6 1.028571 TMP411-Q1, TMP411D-Q1 SBOS527G – DECEMBER 2010 – REVISED SEPTEMBER 2025 www.ti.com 36 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: TMP411-Q1 TMP411D-Q1 |
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