TMP411D datasheet(34/60 Pages) TI2

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The RTHRM bit reads as 1 if the remote temperature exceeds the remote THERM limit, remains greater than the

remote THERM limit, and is less than the value in the shared Hysteresis Register; see Figure 7-9.

The LTHRM bit reads as 1 if the local temperature exceeds the local THERM limit, remains greater than the local

THERM limit, and is less than the value in the shared Hysteresis Register; see Figure 7-9.

The LHIGH and RHIGH bit values depend on the state of the AL/TH bit in the Configuration Register. If the

AL/TH bit is 0, the LHIGH bit reads as 1 if the local high limit is exceeded since the last clearing of the Status

function. LHIGH reads as 1 if the local temperature has exceeded the local high limit and remains greater than

the local high limit, and less than the value in the Hysteresis Register.

The RHIGH bit reads as 1 if the remote temperature exceeds the remote high limit and remains greater than the

remote high limit, and less than the value in the Hysteresis Register.

The LLOW and RLOW bits are not affected by the AL/TH bit. The LLOW bit reads as 1 if the local low limit

is exceeded since the last clearing of the Status Register. The RLOW bit reads as 1 if the remote low limit is

exceeded since the last clearing of the Status Register. When there is no remote diode connected and the power

supply ramp rate is less than 240V/s, the RLOW flag is set, as well and must be ignored.

The values of the LLOW, RLOW, and OPEN (as well as LHIGH and RHIGH when AL/TH is 0) are latched and

read as 1 until the Status Register is read or a device reset occurs. These bits are cleared by reading the Status

and RTHRM (as well as LHIGH and RHIGH when ALERT/ THERM2 is 1) are not latched and are not cleared

by reading the Status Register. The values of BUSY, LTHRM, and RTHRM always indicate the current state, and

are updated appropriately at the end of the corresponding ADC conversion. Clearing the Status Register bits

does not clear the state of the ALERT pin; an SMBus alert response address command must be used to clear

the ALERT pin.

The TMP411-Q1 and TMP411D-Q1 NORs LHIGH, LLOW, RHIGH, RLOW, and OPEN, so a status change for

any of these flags from 0 to 1 automatically causes the ALERT pin to go low (This only applies when the ALERT/

THERM2 pin is configured for ALERT mode).

Table 8-2. Status Register Format

STATUS REGISTER (Read = 02h, Write = NA)

BIT #

BIT NAME

BUSY

LHIGH

LLOW

RHIGH

RLOW

OPEN

RTHRM

LTHRM

POR VALUE

0(1)

(1)

The BUSY bit changes to 1 almost immediately (<<100μs) following power up, as the TMP411-Q1 and TMP411D-Q1 begin the first

temperature conversion. The BUSY bit is high whenever the TMP411-Q1 and TMP411D-Q1 devices are converting a temperature

reading.

8.6 Configuration Register

The Configuration Register sets the temperature range, controls Shutdown mode, and determines how the

ALERT/ THERM2 pin functions. The Configuration Register is set by writing to pointer address 09h and by

reading from pointer address 03h.

The MASK bit (bit 7) enables or disables the ALERT pin output if AL/TH = 0. If AL/TH = 1, then the MASK bit

has no effect. If MASK is set to 0, the ALERT pin goes low when one of the temperature measurement channels

exceeds the high or low limits for the selected number of consecutive conversions. If the MASK bit is set to 1, the

TMP411-Q1 and TMP411D-Q1 retain the ALERT pin status, but the ALERT pin does not go low.

The shutdown (SD) bit (bit 6) enables or disables the temperature measurement circuitry. If SD = 0, the

TMP411-Q1 and TMP411D-Q1 convert continuously at the rate set in the conversion rate register. When SD is

set to 1, the TMP411-Q1 and TMP411D-Q1 immediately stop converting and enter a Shutdown mode. When SD

TMP411-Q1, TMP411D-Q1

SBOS527G – DECEMBER 2010 – REVISED SEPTEMBER 2025

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