TMP411D datasheet(32/60 Pages) TI2

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8.1 Register Information

The TMP411-Q1 and TMP411D-Q1 contains multiple registers for holding configuration information, temperature

measurement results, temperature comparator maximum and minimum limits, and status information. These

registers are described in Figure 8-1 and Table 8-1.

8.2 Pointer Register

Figure 8-1 shows the internal register structure of the TMP411-Q1 and TMP411D-Q1. The 8-bit Pointer Register

is used to address a given data register. The Pointer Register identifies which of the data registers must

respond to a read or write command on the two-wire bus. This register is set with every write command. A write

command must be issued to set the proper value in the Pointer Register before executing a read command.

Table 8-1 describes the pointer address of the registers available in the TMP411-Q1 and TMP411D-Q1. Please

note the read pointer addresses 0x05, 0x07, 0x19, and 0x20 have different power-on-reset values for A, B, C vs

D. The power-on-reset (POR) value of the Pointer Register is 00h (0000 0000b).

One Shot Register

Figure 8-1. Internal Register Structure

8.3 Temperature Registers

The TMP411-Q1 and TMP411D-Q1 have four 8-bit registers that hold temperature measurement results. Both

the local channel and the remote channel have a high byte register that contains the most significant bits

(MSBs) of the temperature analog-to-digital converter (ADC) result and a low-byte register that contains the

least significant bits (LSBs) of the temperature ADC result. The local channel high byte address is 00h; the

local channel low byte address is 15h. The remote channel high byte is at address 01h; the remote channel

low byte address is 10h. These registers are read-only and are updated by the ADC each time a temperature

measurement is completed.

The TMP411-Q1 and TMP411D-Q1 contain circuitry to verify that a low byte register read command returns data

from the same ADC conversion as the immediately preceding high byte read command. This verification remains

valid only until another register is read. For proper operation, the high byte of a temperature register must be

read first. The low byte register must be read in the next read command. The low byte register can be left unread

if the LSBs are not needed. Alternatively, the temperature registers can be read as a 16-bit register by using a

single two-byte read command from address 00h for the local channel result or from address 01h for the remote

channel result. The high byte is read first, followed by the low byte. Both bytes of this read operation are from the

same ADC conversion. The power-on-reset value of both temperature registers is 00h.

TMP411-Q1, TMP411D-Q1

SBOS527G – DECEMBER 2010 – REVISED SEPTEMBER 2025

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