TMP411D datasheet(19/60 Pages) TI2

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7 Detailed Description

7.1 Overview

The TMP411-Q1 and TMP411D-Q1 devices are dual-channel digital temperature sensors that combine a

local die-temperature measurement channel and a remote junction-temperature measurement channel in a

single VSSOP-8 or SOT23-8 package. The TMP411-Q1 and TMP411D-Q1 devices are two-wire-compatible

and SMBus interface-compatible and are specified over an ambient temperature range of –40°C to 125°C.

The TMP411-Q1 and TMP411D-Q1 devices contain multiple registers for holding configuration information,

temperature measurement results, temperature comparator maximum/minimum limits, and status information.

User-programmed high- and low-temperature limits stored in the TMP411-Q1 and TMP411D-Q1 devices can be

used to trigger an overtemperature alarm (ALERT) on local and remote temperatures. Additional thermal limits

can be programmed into the TMP411-Q1 and TMP411D-Q1 devices and used to trigger another flag (THERM)

that initiates a system response to rising temperatures.

The TMP411-Q1 and TMP411D-Q1 devices require only a transistor connected between D+ and D− for proper

remote temperature sensing operation. The SCL and SDA interface pins require pullup resistors as part of the

communication bus, whereas ALERT and THERM pins are open-drain outputs that also need pullup resistors.

ALERT and THERM pins can be shared with other devices if desired for a wired-OR implementation. A

0.1μF power-supply bypass capacitor is recommended for good local bypassing. Figure 7-1 shows a typical

configuration for the TMP411-Q1 and TMP411D-Q1 devices.

0.1µF

D+

V+

CDIFF

GND

SCL

SDA

ALERT/THERM2

THERM

+5V

SMBus

Controller

Fan Controller

Series Resistance

(B)

(C)

(B)

10k

(typ)

10k

(typ)

10k

(typ)

10k

(typ)

TMP411-Q1

TMP411D-Q1

CDIFF

(C)

(B)

PNP Diode-connected configuration

(A):

Transistor-connected configuration

(A):

NPN Diode-connected configuration

(A):

A diode-connected configuration provides better settling time. The transistor-connected configuration provides better series resistance

cancellation. NPN transistors must be diode-connected. PNP transistors can either be transistor-connected or diode-connected. TI

recommends this layout for the MMBT3906LP and MMBT3904LP devices.

RS (optional) must be < 1.5kΩ in most applications. Selection of RS depends on the specific application; see Filtering.

CDIFF (optional) must be < 1000pF in most applications. Selection of CDIFF depends on the specific application; see Filtering, Figure

6-12 (Figure 6-13 for the new chip), and Figure 6-28.

Figure 7-1. Basic Connections

www.ti.com

TMP411-Q1, TMP411D-Q1

SBOS527G – DECEMBER 2010 – REVISED SEPTEMBER 2025

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Product Folder Links: TMP411-Q1 TMP411D-Q1

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