PM7344 datasheet(199/293 Pages) PMC

199 / 293 page

PM7344 S/UNI-MPH

DATA SHEET

PMC-950449

ISSUE 6

MULTI-PHY USER NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

183

User-programmable Cell Pattern Registers, and their associated Cell Mask

Registers, are passed through the FIFO.

HCK:

The HCK bit controls a FIFO data path integrity check. The integrity check

consists of inserting either an alternating AAH/55H pattern, or a fixed 55H

pattern, in the HCS octet location as selected by the FIXPAT bit in the RXCP

Framing Control register. The AA/55H pattern alternates with each cell

written to the FIFO. An external device reading cells from the receive FIFO

verifies that either the alternating or the fixed pattern is present in the cell

stream. Any pattern discrepancy indicates a failure in the receive data path.

When a logic 1 is written to HCK, the data path integrity check is enabled,

and the HCS octet location is overwritten with the alternating pattern. When

a logic 0 is written to HCK, the received HCS value is passed unaltered

through the FIFO.

HCSADD:

The HCSADD bit enables the addition of the coset polynomial x6 + x4 + x2 + 1

to the received HCS octet before comparison with the calculated result as

required by the ATM Forum UNI specification. When a logic 1 is written to

HCSADD, the coset polynomial is added to the HCS. When a logic 0 is

written to HCSADD, the unmodified HCS value is compared with the

calculated result.

HCSDQDB:

The HCSDQDB bit controls the cell header octets included in the HCS

calculation. When a logic 1 is written to HCSDQDB, header octets two, three,

and four are used in the HCS calculation as required by the IEEE-802.6

DQDB specification. When a logic 0 is written to HCSDQDB, all four header

octets are used in the HCS calculation as required by the ATM Forum UNI

specification, and the ITU-T Recommendation I.432.

HCSPASS:

The HCSPASS bit enables cells containing HCS errors to be passed through

the receive FIFO. When a logic 1 is written to HCSPASS, cells containing

detectable HCS errors are written to the receive FIFO. When a logic 0 is

written to HCSPASS, cells containing detectable HCS errors are dropped.

Note that all cells are dropped while an out of cell delineation defect is

detected.

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