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PM7344 bảng dữ liệu(PDF) 37 Page - PMC-Sierra, Inc

tên linh kiện PM7344
Giải thích chi tiết về linh kiện  SATURN QUAD T1/E1 MULTI-PHY USER NETWORK INTERFACE DEVICE
PDF  293 Pages
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nhà sản xuất  PMC [PMC-Sierra, Inc]
Trang chủ  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7344 bảng dữ liệu(HTML) 37 Page - PMC-Sierra, Inc

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PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
21
Pin Name
Type
Pin
No.
Function
RDLCLK[4]
RDLCLK[3]
RDLCLK[2]
RDLCLK[1]/
Output
78
77
76
75
Receive Data Link Clock (RDLCLK). The
RDLCLK signal is available on this pin when the
internal HDLC receiver (RFDL) is disabled from
use. RDLCLK is used to process the data
stream contained on RDLSIG. When the S/UNI-
MPH is configured to receive T1-SF formatted
data, or when the T1/E1 framers are bypassed,
RDLCLK is held low. In all other formats the
rising edge of RDLCLK can be used to sample
the data on RDLSIG.
RDLEOM[4]
RDLEOM[3]
RDLEOM[2]
RDLEOM[1]
Receive Data Link End of Message (RDLEOM).
The RDLEOM signal is available on this pin
when RFDL is enabled. RDLEOM goes high
when the last byte of a received sequence is
read from the RFDL FIFO buffer, or when the
FIFO buffer is overrun.
TDLSIG[4]
TDLSIG[3]
TDLSIG[2]
TDLSIG[1]/
I/O
42
41
40
39
Transmit Data Link Signal (TDLSIG). The
TDLSIG signal is input on this pin when the
internal HDLC transmitter (XFDL) is disabled
from use. TDLSIG is the source for the data
stream to be inserted into the data link. When
the S/UNI-MPH is configured to transmit T1-ESF
formatted data, TDLSIG contains the data
stream inserted in the facility data link; when the
S/UNI-MPH is configured to transmit T1-SF
formatted data, TDLSIG is ignored; when the
S/UNI-MPH is configured to transmit E1
formatted data, TDLSIG contains the data
stream inserted in timeslot 16 or a data stream
inserted in any combination of the national bits.
TDLSIG is sampled on the rising edge of
TDLCLK.
TDLINT[4]
TDLINT[3]
TDLINT[2]
TDLINT[1]
Transmit Data Link Interrupt (TDLINT). The
TDLINT signal is output on this pin when XFDL
is enabled. TDLINT goes high when the last
data byte written to the XFDL has been set up
for transmission and processor intervention is
required to either write control information to end
the message, or to provide more data.



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