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PM7344 bảng dữ liệu(PDF) 51 Page - PMC-Sierra, Inc

tên linh kiện PM7344
Giải thích chi tiết về linh kiện  SATURN QUAD T1/E1 MULTI-PHY USER NETWORK INTERFACE DEVICE
PDF  293 Pages
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nhà sản xuất  PMC [PMC-Sierra, Inc]
Trang chủ  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7344 bảng dữ liệu(HTML) 51 Page - PMC-Sierra, Inc

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PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
35
Pin Name
Type
Pin
No.
Function
TSOC
Input
36
Transmit Start of Cell (TSOC). This input marks
the start of cell on the TDAT[7:0] bus. When
TSOC is high, the first octet of the cell is present
on the TDAT[7:0] stream. It is not necessary for
TSOC to be present at each cell. An interrupt
may be generated if TSOC is high during any
byte other than the first byte. TSOC is sampled
on the rising edge of TFCLK
TCA[4]
TCA[3]
TCA[2]
TCA[1]
Output
57
56
55
54
Transmit Cell Available (TCA[4:1]). These
output signals indicate when a cell is available in
the transmit FIFO for the corresponding port.
When high, TCA indicates that the
corresponding transmit FIFO is not full and a
complete cell may be written. When TCA goes
low, it can be configured to indicate either that
the corresponding transmit FIFO is near full and
can accept no more than four writes or that the
corresponding transmit FIFO is full. TCA[4:1]
will thus transition low on the rising edge of
TFLCK on which the 52nd or 48th byte is
sampled. To reduce FIFO latency, the FIFO
depth at which TCA indicates "full" can be set to
one, two, three or four cells.
INTB
Output
32
Active low Open-Drain Interrupt (INTB). This
signal goes low when an unmasked interrupt
event is detected on any of the internal interrupt
sources, including the internal HDLC
transceivers. Note that INTB will remain low
until all active, unmasked interrupt sources are
acknowledged at their source.
CSB
Input
113
Active low Chip Select (CSB). This signal must
be low to enable S/UNI-MPH register accesses.
If CSB is not used, (RDB and WRB determine
register reads and writes) then it should be tied
to an inverted version of RSTB.



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