TMPR4925 datasheet(310/590 Pages) TOSHIBA

310 / 590 page

Chapter 10 PCI Controller

10-48

10.4.22 PCI Bus Arbiter Request Port Register (PBAREQPORT) 0xD100

This register sets the correlation between each PCI Bus request source (PCI Controller and

REQ[3:0]) and each Internal PCI Bus Arbiter Request port (Master A - D, W - Z) (see Figure 10.3.9).

When changing these settings, each of the eight field values must always be set to different values.

After changing this register, the Broken Master Register (BM) value becomes invalid since the bit

mapping changes.

This register is only valid when using the on-chip PCI Bus Arbiter.

Reserved

ReqAP

Reserved

ReqBP

Reserved

ReqCP

Reserved

ReqDP

R/W

: Type

111

110

101

100

: Initial value

Reserved

ReqWP

Reserved

ReqXP

Reserved

ReqYP

Reserved

ReqZP

R/WR/W

: Type

011

010

001

000

: Initial value

Bits

Mnemonic

Field Name

Description



Reserved



30:28

ReqAP

Request A Port

Request A Port (Initial value: 111, R/W)

Sets the PCI Bus Master that connects to the Internal PCI Bus Arbiter Request A Port

(Master A).

111: Makes the PCI Controller Master A.

110: Reserved

101: Reserved

100: Reserved

011: Makes REQ*[3] Master A.

010: Makes REQ*[2] Master A.

001: Makes REQ*[1] Master A.

000: Makes REQ*[0] Master A.



Reserved



26:24

ReqBP

Request B Port

Request B Port (Initial value: 110, R/W)

Sets the PCI Bus Master that connects to the Internal PCI Bus Arbiter Request B Port

(Master B).

111: Makes the PCI Controller Master B.

110: Reserved

101: Reserved

100: Reserved

011: Makes REQ*[3] Master B.

010: Makes REQ*[2] Master B.

001: Makes REQ*[1] Master B.

000: Makes REQ*[0] Master B.



Reserved



22:20

ReqCP

Request C Port

Request C Port (Initial value: 101, R/W)

Sets the PCI Bus Master that connects to the Internal PCI Bus Arbiter Request C Port

(Master C).

111: Makes the PCI Controller Master C.

110: Reserved

101: Reserved

100: Reserved

011: Makes REQ*[3] Master C.

010: Makes REQ*[2] Master C.

001: Makes REQ*[1] Master C.

000: Makes REQ*[0] Master C.



Reserved



Figure 10.4.22 PCI Bus Arbiter Request Port Register (1/2)

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