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TMPR4925 bảng dữ liệu(PDF) 343 Page - Toshiba Semiconductor |
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TMPR4925 bảng dữ liệu(HTML) 343 Page - Toshiba Semiconductor |
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343 / 590 page ![]() Chapter 10 PCI Controller 10-81 10.4.53 G2P Configuration Address Register(G2PCFGADRS) 0xD1A0[m3] 31 24 23 16 Reserved BUSNUM R/W : Type 0x00 : Initial value 15 11 10 8 7 2 1 0 DEVNUM FNNUM REGNUM TYPE R/W R/W R/W R/W : Type 0x00 000 0x00 00 : Initial value Bits Mnemonic Field Name Description 31:24 Reserved 23:16 BUSNUM Bus Number Bus Number (Initial value: 0x00, R/W) Indicates the target PCI Bus Number (one of 256). 15:11 DEVNUM Device Number Device Number (Initial value: 0x00, R/W) This field is used to identify the target physical device number. (This is one number out of 32 devices. 21 of these 32 devices are used.) When in the address phase of Type 0 configuration access, AD[31:11] of the upper 21 address lines are used as the IDSEL signal. 0x00: Use AD [11] as IDSEL. 0x01: Use AD [12] as IDSEL. 0x02: Use AD [13] as IDSEL. : : 0x13: Use AD [30] as IDSEL. 0x14: Use AD [31] as IDSEL. 0x15 - 0x1F: Reserved 10:8 FNNUM Function Number Function Number (Initial value: 000, R/W) This field is used to identify the target logic function number (one out of 8). 7:2 REGNUM Register Number Register Number (Initial value: 0x00, R/W) This field is used to identify the DWORD (one out of 64) inside the Configuration Space of the target function 1:0 TYPE Type Type (Initial value: 00, R/W) This field is used to identify the address type in the address phase of the target function configuration cycle. 0x0: Type 0 configuration (Use the AD[31:11] signal as the IDSEL signal.) 0x1: Type 1 configuration (Output all bits unchanged as the address to the AD[ ] signal.) Figure 10.4.53 G2P Configuration Address Register |
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