S75WS256NDFBAWMB datasheet(120/216 Pages) SPANSION

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118

S75WS256Nxx Based MCPs

S75WS-N-00_00_A0 February 17, 2005

Data

Sheet

tSEA. Any sector erase address and command following the exceeded time-out may or may not

be accepted. Any command other than Sector Erase or Erase Suspend during the time-out period

resets the device to the read mode.

The system can monitor DQ3 to determine if the sector erase timer has timed out (See DQ3: Sec-

tor Erase Timer.) The time-out begins from the rising edge of the final WE# pulse in the command

sequence.

When the Embedded Erase algorithm is complete, the device returns to reading array data and

addresses are no longer latched. The system can determine the status of the erase operation by

reading DQ7 or DQ6/DQ2. Refer to the Write Operation Status section for information on these

status bits.

Once the sector erase operation has begun, only the Erase Suspend command is valid. All other

commands are ignored. However, note that a hardware reset immediately terminates the erase

operation. If that occurs, the sector erase command sequence should be reinitiated once the de-

vice has returned to reading array data, to ensure data integrity.

Figure 20.4 illustrates the algorithm for the erase operation. Refer to the Erase/Program Opera-

tions table in the Erase/Program Operations section for parameters and timing diagrams.

19.10.1 Accelerated Sector Erase

Under certain conditions, the device can erase sectors in parallel. This method of erasing sectors

is faster than the standard sector erase command sequence. Table 19.6lists the sectors.

The accelerated sector erase function must not be used more than 100 times per sector.

In addition, accelerated sector erase should be performed at room temperature 30°C (+/-) 5°C.

Use the following procedure to perform accelerated sector erase:

Unlock all sectors in a sector to be erased using the sector lock/unlock command sequence.

All sectors that remain locked will not be erased.

Apply 9 V to the ACC input. This voltage must be applied at least 1 µs before executing

step 3.

Write 80h to any address within a sector to be erased.

Write 30h to any address within a sector to be erased.

Monitor status bits DQ2/DQ6 or DQ7 to determine when erasure is complete, just as in the

standard erase operation. See the Write Operation Status section for further details.

Lower ACC from 9 V to VCC.

Relock sectors as required.

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