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February 17, 2005 S75WS-N-00_00_A0
S75WS256Nxx Based MCPs
121
Data
Sheet
21 Command Definitions
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the rising edge of the AVD# pulse or active edge of CLK which ever
comes first.
PD = Data to be programmed at location PA. Data latches on the rising edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A24–A14 for the RS512N uniquely select any sector.
CR = Configuration Register data bits D15–D0.
WBL = Write Buffer Location. Address must be within the same write buffer page as PA.
WC = Word Count. Number of write buffer locations to load minus 1.
Notes:
1. See Table 18.1 for description of bus operations.
2. All values are in hexadecimal.
3. Except for the following, all bus cycles are write cycle: read cycle, fourth through sixth cycles of the Autoselect commands, fourth cycle of
the configuration register verify command, and any cycle reading at RD(0) and RD(1).
4. Data bits DQ15–DQ8 are don’t care in command sequences, except for RD, PD, and WD.
5. Unless otherwise noted, address bits Amax–A12 are don’t cares.
6. Writing incorrect address and data values or writing them in the improper sequence may place the device in an unknown state. The system
must write the reset command to return the device to reading array data.
7. No unlock or command cycles required when device is reading array data.
8. The Reset command is required to return to reading array data (or to the erase-suspend-read mode if previously in Erase Suspend) when
device is in the autoselect mode, or if DQ5 goes high (while the device is providing status information) or performing sector lock/unlock.
9. The fourth cycle of the autoselect command sequence is a read cycle. See the Autoselect Command Sequence section.
10. 512 Mb: 0Eh = 29h and 0Fh = 01h.
11. See the Autoselect Command Sequence section.
12. The Unlock Bypass command sequence is required prior to this command sequence.
13. The Unlock Bypass Reset command is required to return to reading array data when the device is in the unlock bypass mode.
14. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. The Erase
Suspend command is valid only during a sector erase operation.
15. The Erase Resume command is valid only during the Erase Suspend mode
16. See the Set Configuration Register Command Sequence section.
17. See the Read Configuration Register Command Sequence section which further provides information on Reset Command to Configure the
Configuration Register.
18. The total number of cycles in the command sequence is determined by the number of words written to the write buffer. The maximum
number of cycles in the command sequence is 37.
19. ACC must be at V
HH during the entire operation of this command
20. Command sequence resets device for next command after write-to-buffer operation.
21. Entry commands are needed to enter a specific mode to enable instructions only available within that mode.
22. Write Buffer Programming can be initiated after Unlock Bypass Entry.
Command Sequence
(Note 1)
Bus Cycles (Notes 1–6)
First
Second
Third
Fourth
Fifth
Sixth
Addr
Data
Addr Data Addr Data
Addr
Data
Addr Data Addr Data
Asynchronous Read (7)
1
RA
RD
Reset (8)
1
XXX
F0
Autoselect
(9)
Manufacturer ID
4
555
AA
2AA
55
555
90
X00
0001
Device ID (10)
6
555
AA
2AA
55
555
90
X01
(11)X0E
(10)X0F(10)
Indicator Bits
4
555
AA
2AA
55
555
90
X03
(11)
Program
4
555
AA
2AA
55
555
A0
PA
Data
Write to Buffer (18)
6
555
AA
2AA
55
SA
25
PA
WC
PA
PD
WBL
PD
Program Buffer to Flash
1
SA
29
Write to Buffer Abort Reset (22)
3
555
AA
2AA
55
555
F0
Chip Erase
6
555
AA
2AA
55
555
80
555
AA
2AA
55
555
10
Sector Erase
6
555
AA
2AA
55
555
80
555
AA
2AA
55
SA
30
Erase Suspend (15)
1
XXX
B0
Erase Resume (15)
1
XXX
30
Set Configuration Register (16)
4
555
AA
2AA
55
555
D0
X00 or X01
CR
Read Configuration Register (17)
4
555
AA
2AA
55
555
C6
X00 or X01
CR
Unlock
Bypass
Mode
Unlock Bypass Entry (21)
3
555
AA
2AA
55
555
20
Unlock Bypass Program (12, 13)2
XX
A0
PA
PD
Unlock Bypass Reset
2
XX
90
XXX
00
Volatile Sector Protection Command Set Definitions
DYB
Volatile Sector Protection
Command Set Entry
3
555
AA
2AA
55
555
E0
DYB Set
2
XX
A0
SA
00
DYB Clear
2
XX
A0
SA
01
DYB Status Read
1
SA
RD(0)
Volatile Sector Protection
Command Set Exit
2XX
90
XX
00



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