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CYT4DNJBJS bảng dữ liệu(PDF) 150 Page - Infineon Technologies AG |
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CYT4DNJBJS bảng dữ liệu(HTML) 150 Page - Infineon Technologies AG |
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150 / 209 page ![]() Datasheet 150 002-24601 Rev. *I 2023-02-14 TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual Electrical specifications Figure 26-20 LVD specifications 26.9.1 SWD, JTAG, and trace specifications Table 26-16 SWD interface specifications Spec ID Parameter Description Min Typ Max Units Details/conditions Recommended I/O Configuration: GPIO_STD: CFG_OUT/DRIVE_SEL<1:0> =0b00, CFG_IN_AUTOLVL/VTRIP_SEL<0:0>= 0b0, CFG_IN/VTRIP_SEL<0:0> = 0b1 SID300 fSWDCLK SWD clock input frequency – – 10 MHz 2.7 V ≤ VDDIO_GPIO ≤ 5.5 V SID301 tSWDI_SETUP SWDI setup time 0.25 × T – – ns T = 1 / fSWDCLK SID302 tSWDI_HOLD SWDI hold time 0.25 × T – – ns T = 1 / fSWDCLK SID303 tSWDO_VALID SWDO valid time – – 0.5 × T ns T = 1 / fSWDCLK SID304 tSWDO_HOLD SWDO hold time 1 – – ns T = 1 / fSWDCLK Table 26-17 JTAG AC specifications Spec ID Parameter Description Min Typ Max Units Details/conditions Recommended I/O Configuration: GPIO_STD: CFG_OUT/DRIVE_SEL<1:0> = 0b00, CFG_IN_AUTOLVL/VTRIP_SEL<0:0>= 0b0, CFG_IN/VTRIP_SEL<0:0> = 0b1 SID620 tJCKH TCK HIGH time 25 – – ns 30-pF load on TDO SID621 tJCKL TCK LOW time 25 – – ns 30-pF load on TDO SID622 tJCP TCK clock period 62.5 – – ns 30-pF load on TDO SID623 tJSU TDI/TMS setup time 6.25 – – ns 30-pF load on TDO SID624 tJH TDI/TMS hold time 6.25 – – ns 30-pF load on TDO SID625 tJZX TDO High-Z to active – – 25 ns 30-pF load on TDO SID626 tJXZ TDO active to High-Z – – 25 ns 30-pF load on TDO SID627 tJCO TDO clock to output – – 25 ns 30-pF load on TDO VDDD Internal LVD signal LVD falling detection point tDLY_ACT/DS_LVD LVD rising detection point tDLY_ACT/DS_LVD LVD tRES_LVD LVD falling detection point VDDD |
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