 |
công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
|
công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
CYT4DNJBJS bảng dữ liệu(PDF) 145 Page - Infineon Technologies AG |
|
|
|||||||||||||||||||||||||||||
CYT4DNJBJS bảng dữ liệu(HTML) 145 Page - Infineon Technologies AG |
|
|
145 / 209 page  Datasheet 145 002-24601 Rev. *I 2023-02-14 TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual Electrical specifications SID559 VTR_4P1_R LVD 4.1 V trimmed rising trip point for VDDD Typ – 4% 4125 Typ + 4% mV Same as VTR_4P1_F+ 25 mV SID560 VTR_4P2_R LVD 4.2 V trimmed rising trip point for VDDD Typ – 4% 4225 Typ + 4% mV Same as VTR_4P2_F+ 25 mV SID561 VTR_4P3_R LVD 4.3 V trimmed rising trip point for VDDD Typ – 4% 4325 Typ + 4% mV Same as VTR_4P3_F+ 25 mV SID562 VTR_4P4_R LVD 4.4 V trimmed rising trip point for VDDD Typ – 4% 4425 Typ + 4% mV Same as VTR_4P4_F+ 25 mV SID563 VTR_4P5_R LVD 4.5 V trimmed rising trip point for VDDD Typ – 4% 4525 Typ + 4% mV Same as VTR_4P5_F+ 25 mV SID564 VTR_4P6_R LVD 4.6 V trimmed rising trip point for VDDD Typ – 4% 4625 Typ + 4% mV Same as VTR_4P6_F+ 25 mV SID565 VTR_4P7_R LVD 4.7 V trimmed rising trip point for VDDD Typ – 4% 4725 Typ + 4% mV Same as VTR_4P7_F+ 25 mV SID566 VTR_4P8_R LVD 4.8 V trimmed rising trip point for VDDD Typ – 4% 4825 Typ + 4% mV Same as VTR_4P8_F+ 25 mV SID567 VTR_4P9_R LVD 4.9 V trimmed rising trip point for VDDD Typ – 4% 4925 Typ + 4% mV Same as VTR_4P9_F+ 25 mV SID568 VTR_5P0_R LVD 5.0 V trimmed rising trip point for VDDD Typ – 4% 5025 Typ + 4% mV Same as VTR_5P0_F+ 25 mV SID569 VTR_5P1_R LVD 5.1 V trimmed rising trip point for VDDD Typ – 4% 5125 Typ + 4% mV Same as VTR_5P1_F+ 25 mV SID570 VTR_5P2_R LVD 5.2 V trimmed rising trip point for VDDD Typ – 4% 5225 Typ + 4% mV Same as VTR_5P2_F+ 25 mV SID571 VTR_5P3_R LVD 5.3 V trimmed rising trip point for VDDD Typ – 4% 5325 Typ + 4% mV Same as VTR_5P3_F+ 25 mV SID573 LVD_RR_A Power ramp rate: VDDD (Active) – – 100 mV/µs SID574 LVD_RR_DS Power ramp rate: VDDD (DeepSleep) – – 10 mV/µs SID575 tDLY_ACT_LVD Active mode delay between VDDD falling/rising through LVD rising/falling point and an internal LVD output transitioning through VDDD / 2 –– 1µs Guaranteed by design SID575A tDLY_DS_LVD DeepSleepmodedelaybetweenVDDD falling/rising through LVD rising/falling point and an internal LVD output transitioning through VDDD / 2 –– 4µs Guaranteed by design SID576 tRES_LVD Response time of LVD, VDDD supply. LVD guaranteed to generate pulse for VDDD pulse width greater than this. (For falling-then-rising supply at max ramp rate; pulse width is time below LVD falling trip point.) 100 – – ns Guaranteed by design High-voltage OVD specifications SID580 VTR_5P0_R High-voltage OVD 5.0-V trimmed rising trip point for VDDD and VDDA_ADC 5.049 5.205 5.361 V SID581 VTR_5P0_F High-voltage OVD 5.0-V trimmed falling trip point for VDDD and VDDA_ADC 5.025 5.18 5.335 V SID582 VTR_5P5_R High-voltage OVD 5.5-V trimmed rising trip point for VDDDandVDDA_ADC (default) 5.548 5.72 5.892 V Table 26-15 System resources (continued) Spec ID Parameter Description Min Typ Max Units Details/ conditions |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Vietnamese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
