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MCIMX503CVM8B bảng dữ liệu(PDF) 85 Page - NXP Semiconductors

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Electrical Characteristics
i.MX50 Applications Processors for Consumer Products, Rev. 7
Freescale Semiconductor
85
Figure 45. Read Sequence Timing Diagram
4.9.7
Pulse Width Modulator (PWM) Timing Parameters
This section describes the electrical information of the PWM. The PWM can be programmed to select one
of three clock signals as its source frequency. The selected clock signal is passed through a prescaler before
being input to the counter. The output is available at the pulse-width modulator output (PWMO) external
pin.
Figure 46 depicts the timing of the PWM, and Table 63 lists the PWM timing parameters.
Figure 46. PWM Timing
Table 62. WR1 /RD Timing Parameters
ID
Parameter
Symbol
Min
Typ
Max
Unit
OW7
Write 1 Low Time
tLOW1
15
15
µs
OW8
Transmission Time Slot
tSLOT
60
117
120
µs
—
Read Data Setup
tSU
——
1
µs
OW9
Read Low Time
tLOWR
15
15
µs
OW10
Read Data Valid
tRDV
—15
—
µs
OW11
Release Time
tRELEASE
0—
45
µs
tSU
OW8
OW10
One-Wire bus
(BATT_LINE)
OW9
OW11
System Clock
2a
1
PWM Output
3b
2b
3a
4b
4a



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