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MCIMX503CVM8B bảng dữ liệu(PDF) 77 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  i.MX50 Applications Processors for Consumer Products
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Electrical Characteristics
i.MX50 Applications Processors for Consumer Products, Rev. 7
Freescale Semiconductor
77
4.9.2.4
eCSPI Slave Mode Timing
Figure 35 depicts the timing of eCSPI in slave mode and Table 53 lists the eCSPI slave mode timing
characteristics.
Figure 35. eCSPI Slave Mode Timing Diagram
Table 53. eCSPI Slave Mode Timing Parameters
ID
Parameter
Symbol
Min
Max
Unit
CS1
eCSPIx_CLK Cycle Time–Read
eCSPIx_CLK Cycle Time–Write
tclk
60
15
—ns
CS2
eCSPIx_CLK High or Low Time
tSW
6—
ns
CS3
eCSPIx_CLK Rise or Fall
tRISE/FALL
——
ns
CS4
eCSPIx_CS_x pulse width
tCSLH
15
—
ns
CS5
eCSPIx_CS_x Lead Time (CS setup time)
tSCS
5—
ns
CS6
eCSPIx_CS_x Lag Time (CS hold time)
tHCS
5—
ns
CS7
eCSPIx_DO Setup Time
tSmosi
5—
ns
CS8
eCSPIx_DO Hold Time
tHmosi
5—
ns
CS9
eCSPIx_DI Setup Time
tSmiso
5—
ns
CS10
eCSPIx_DI Hold Time
tHmiso
5—
ns
CS1
CS7 CS8
CS2
CS2
CS4
CS6
CS5
CS9CS10
eCSPIx_CLK
eCSPIx_CS_x
eCSPIx_DI
eCSPIx_DO
CS3
CS3



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