MCIMX503CVM8B datasheet(16/136 Pages) NXP

16 / 136 page

i.MX50 Applications Processors for Consumer Products, Rev. 7

Modules List

Freescale Semiconductor

SSI-1

SSI-2

I2S/SSI/AC97

Interface

Slave

Connectivity

Peripherals

The SSI is a full-duplex synchronous interface used on the i.MX50 processor

to provide connectivity with off-chip audio peripherals. The SSI interfaces

connect internally to the AUDMUX for mapping to external ports. The SSI

supports a wide variety of protocols (SSI normal, SSI network, I2S, and

AC-97), bit depths (up to 24 bits per word), and clock/frame sync options.

Each SSI has two pairs of 8 x 24 FIFOs and hardware support for an external

DMA controller in order to minimize its impact on system performance. The

second pair of FIFOs provides hardware interleaving of a second audio

stream, which reduces CPU overhead in use cases where two time slots are

being used simultaneously.

Temperature

Monitor

Temp Sensor

Analog

The temperature sensor is an internal module to the i.MX50 that monitors the

die temperature.

UART-1

UART-2

UART-3

UART-4

UART-5

UART Interface,

ver. 2

Slave

Connectivity

Peripherals

Each of the UARTv2 modules supports the following serial data

transmit/receive protocols and configurations:

• 7 or 8-bit data words, 1 or 2 stop bits, programmable parity (even, odd, or

none)

• Programmable bit-rates up to 4 Mbps. This is a higher max baud rate

relative to the 1.875 Mbps, which is specified by the TIA/EIA-232-F

standard.

• 32-byte FIFO on Tx and 32 half-word FIFO on Rx supporting auto-baud

• IrDA 1.0 support (up to SIR speed of 115200 bps)

USB-OH-1

USB 2.0

High-Speed

OTG-capable

and Host ports

Master

Connectivity

Peripherals

USB-OH-1 supports USB2.0 HS/FS/LS, and contains:

• One high-speed OTG-capable module with integrated HS USB PHY

• One high-speed Host module with integrated HS USB PHY

WDOG-1

Watch Dog

Timer

Peripherals

The Watchdog (WDOG) timer module protects against system failures by

providing a method of escaping from unexpected events or programming

errors. The WDOG Timer supports two comparison points during each

counting period. Each of the comparison points is configurable to invoke an

interrupt to the ARM core, and a second point invokes an external event on

the WDOG line.

XTALOSC

Crystal

Oscillator I/F

Clocking

The XTALOSC module combined with an external 24 MHz crystal with load

capacitors implements a crystal oscillator.

Table 4. i.MX50 Digital and Analog Modules (continued)

Block

Mnemonic

Block Name

Subsystem

Brief Description

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