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PCI1520PDVG4 bảng dữ liệu(PDF) 102 Page - Texas Instruments |
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PCI1520PDVG4 bảng dữ liệu(HTML) 102 Page - Texas Instruments |
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102 / 140 page ![]() 5−7 5.3 ExCA Power Control Register The ExCA power control register provides PC Card power control. Bit 7 (COE) of this register controls the 16-bit output enables on the socket interface, and can be used for power management in 16-bit PC Card applications. See Table 5−4 and Table 5−5 for a complete description of the register contents. Bit 7 6 5 4 3 2 1 0 Name ExCA power control Type RW R R RW RW R RW RW Default 0 0 0 0 0 0 0 0 Register: ExCA power control Offset: CardBus socket address + 802h; Card A ExCA offset 02h Card B ExCA offset 42h Type: Read-only, Read/Write Default: 00h Table 5−4. ExCA Power Control Register Description—82365SL Support BIT SIGNAL TYPE FUNCTION 7 COE RW Card output enable. Bit 7 controls the state of all of the 16-bit outputs on the PCI1520. This bit is encoded as: 0 = 16-bit PC Card outputs disabled (default) 1 = 16-bit PC Card outputs enabled 6 RSVD R Reserved. Bit 6 returns 0 when read. 5 AUTOPWRSWEN RW Auto power switch enable. 0 = Automatic socket power switching based on card detects is disabled. 1 = Automatic socket power switching based on card detects is enabled. 4 CAPWREN RW PC Card power enable. 0 = VCC = No connection 1 = VCC is enabled and controlled by bit 2 (EXCAPOWER) of the system control register (PCI offset 80h, see Section 4.29). 3−2 RSVD R Reserved. Bits 3 and 2 return 0s when read. 1−0 EXCAVPP RW PC Card VPP power control. Bits 1 and 0 are used to request changes to card VPP. The PCI1520 ignores this field unless VCC to the socket is enabled. This field is encoded as: 00 = No connection (default) 01 = VCC 10 = 12 V 11 = Reserved Table 5−5. ExCA Power Control Register Description—82365SL-DF Support BIT SIGNAL TYPE FUNCTION 7 COE RW Card output enable. Bit 7 controls the state of all of the 16-bit outputs on the PCI1520. This bit is encoded as: 0 = 16-bit PC Card outputs disabled (default) 1 = 16-bit PC Card outputs enabled 6−5 RSVD R Reserved. Bits 6 and 5 return 0s when read. 4−3 EXCAVCC RW VCC. Bits 4 and 3 are used to request changes to card VCC. This field is encoded as: 00 = 0 V (default) 01 = 0 V reserved 10 = 5 V 11 = 3.3 V 2 RSVD R Reserved. Bit 2 returns 0 when read. 1−0 EXCAVPP RW VPP. Bits 1 and 0 are used to request changes to card VPP. The PCI1520 ignores this field unless VCC to the socket is enabled. This field is encoded as: 00 = No connection (default) 01 = VCC 10 = 12 V 11 = Reserved |
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