PCI1520PDVG4 datasheet(85/140 Pages) TI

85 / 140 page

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4.34 Diagnostic Register

The diagnostic register is provided for internal TI test purposes. It is a read/write register, but only 0s should be written

to it. See Table 4−13 for a complete description of the register contents.

Bit

Name

Diagnostic

Type

Default

Diagnostic

Offset:

93h (functions 0, 1)

Type:

Read/Write

Default:

60h

Table 4−13. Diagnostic Register Description

BIT

SIGNAL

TYPE

FUNCTION

7†

TRUE_VAL

This bit defaults to 0. This bit is encoded as:

0 = Reads true values in PCI vendor ID and PCI device ID registers (default)

1 = Reads all 1s in reads from the PCI vendor ID and PCI device ID registers

RSVD

Reserved. Bit 6 returns 1 when read.

CSC

CSC interrupt routing control

0 = CSC interrupts routed to PCI if ExCA 803 bit 4 = 1

1 = CSC interrupts routed to PCI if ExCA 805 bits 7−4 = 0000b (default)

In this case, the setting of ExCA 803 bit 4 is a don’t care.

4†

DIAG4

Diagnostic RETRY_DIS. Delayed transaction disable.

3†

DIAG3

Diagnostic RETRY_EXT. Extends the latency from 16 to 64.

2†

DIAG2

Diagnostic DISCARD_TIM_SEL_CB. Set = 210, reset = 215.

1†

DIAG1

Diagnostic DISCARD_TIM_SEL_PCI. Set = 210, reset = 215.

STDZVEN

Standardized zoomed video register model enable.

0 = Enable the standardized zoomed video register model (default).

1 = Disable the standardized zoomed video register model.

† This bit is global and is accessed only through function 0.

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