PCI1520PDVG4 datasheet(12/140 Pages) TI

12 / 140 page

1−3

1.6

PCI1520 Data Manual Document History

DATE

PAGE NUMBER

REVISION

01/2003

2−1

Corrected part number typo in the first sentence of the page

01/2003

2−15

Corrected description of EEPROM detection scheme. EEPROM detection happens on

deassertion of GRST rather than PRST.

01/2003

3−2

Added new subsection 3.4.1 to describe GRST during power up

12/2003

3−3

Corrected bit description of SUBSYSRW bit in the system control register

01/2003

3−13

Modified byte-read diagram (Figure 3−12) to better reflect a read transaction to the EEPROM

01/2003

3−23

Modified description of power management capabilities register. This register is not a static

read-only register.

01/2003

4−13

Corrected default value for interrupt pin register

01/2003

4−26

Corrected default value for power management capabilities register

01/2003

5−13

Corrected typo on register description for ExCA I/O windows 0 and 1 start-address high-byte

01/2003

5−24

Corrected typo on the bit type for ExCA memory 0−4 page register

01/2003

6−8

Corrected default value for socket control register

01/2003

6−8

Modified description for bit 10 in the socket control register

03/2004

Cover

Added ZHK package to document title

03/2004

1−1

Added ZHK package to text

03/2004

2−1

Added ZHK package to text

03/2004

8−1

Added ZHK package to text

03/2004

8−2

Added ZHK mechanical

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