PCI1520PDVG4 datasheet(101/140 Pages) TI

101 / 140 page

5−6

5.2

ExCA Interface Status Register

The ExCA interface status register provides information on the current status of the PC Card interface. An X in the

default bit value indicates that the value of the bit after reset depends on the state of the PC Card interface. See

Table 5−3 for a complete description of the register contents.

Bit

Name

ExCA interface status

Type

Default

ExCA interface status

Offset:

CardBus socket address + 801h; Card A ExCA offset 01h

Card B ExCA offset 41h

Type:

Read-only

Default:

00XX XXXXb

Table 5−3. ExCA Interface Status Register Description

BIT

SIGNAL

TYPE

FUNCTION

RSVD

Reserved. Bit 7 returns 0 when read.

CARDPWR

Card Power. Bit 6 indicates the current power status of the PC Card socket. This bit reflects how the ExCA

power control register (ExCA offset 02h/42h/802h, see Section 5.3) is programmed. Bit 6 is encoded as:

0 = VCC and VPP to the socket turned off (default)

1 = VCC and VPP to the socket turned on

READY

Ready. Bit 5 indicates the current status of the READY signal at the PC Card interface.

0 = PC Card not ready for data transfer

1 = PC Card ready for data transfer

CARDWP

Card write protect (WP). Bit 4 indicates the current status of WP at the PC Card interface. This signal reports

to the PCI1520 whether or not the memory card is write protected. Furthermore, write protection for an entire

PCI1520 16-bit memory window is available by setting the appropriate bit in the memory window

offset-address high-byte register.

0 = WP is 0. PC Card is read/write.

1 = WP is 1. PC Card is read-only.

CDETECT2

Card detect 2. Bit 3 indicates the status of CD2 at the PC Card interface. Software may use this and bit 2

(CDETECT1) to determine if a PC Card is fully seated in the socket.

0 = CD2 is 1. No PC Card is inserted.

1 = CD2 is 0. PC Card is at least partially inserted.

CDETECT1

Card detect 1. Bit 2 indicates the status of CD1 at the PC Card interface. Software may use this and bit 3

(CDETECT2) to determine if a PC Card is fully seated in the socket.

0 = CD1 is 1. No PC Card is inserted.

1 = CD1 is 0. PC Card is at least partially inserted.

1−0

BVDSTAT

Battery voltage detect. When a 16-bit memory card is inserted, the field indicates the status of the battery

voltage detect signals (BVD1, BVD2) at the PC Card interface, where bit 1 reflects the BVD2 status and bit 0

reflects BVD1.

00 = Battery dead

01 = Battery dead

10 = Battery low; warning

11 = Battery good

When a 16-bit I/O card is inserted, this field indicates the status of SPKR (bit 1) and STSCHG (bit 0) at the

PC Card interface. In this case, the two bits in this field directly reflect the current state of these card outputs.

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