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PMS232 bảng dữ liệu(PDF) 28 Page - PADAUK Technology. |
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PMS232 bảng dữ liệu(HTML) 28 Page - PADAUK Technology. |
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28 / 94 page ![]() PMC232/PMS232 Series 12-bit ADC Enhanced FPPA TM 8-bit OTP Controller ©Copyright 2018, PADAUK Technology Co. Ltd Page 28 of 94 PDK-DS-PMx232_V104– Dec. 18, 2018 5. Functional Description 5-1. Processing Units There are two processing units (FPP unit) inside the chip of PMC232/PMS232. In each processing unit, it includes (i) its own Program Counter to control the program execution sequence (ii) its own Stack Pointer to store or restore the program counter for program execution (iii) its own accumulator (iv) Status Flag to record the status of program execution. Each FPP unit has its own program counter and accumulator for program execution, flag register to record the status, and stack pointer for jump operation. Based on such architecture, FPP unit can execute its own program independently, thus parallel processing can be expected. These two FPP units share the same 2k×16 bits OTP program memory, 160 bytes data SRAM and all the IO ports, these two FPP units are operated at mutual exclusive clock cycles to avoid interference. One task switch is built inside the chip to decide which FPP unit should be active for the corresponding cycle. The hardware diagram and basic timing diagram of FPP units are illustrated in Fig. 1. For FPP0 unit, its program will be executed in sequence every other system clock, shown as (M-1)th, Mth and (M+1)th instructions. For FPP1 unit, its program will be also executed in sequence every other system clock, shown as (N-1)th, Nth and (N+1)th instructions. Fig.1: Hardware and Timing Diagram of FPP unit Each FPP unit has half computing power of whole system; for example, FPP0 and FPP1will be operated at 4MHz if system clock is 8MHz. The FPP unit can be enabled or disabled by programming the FPP unit Enable Register, only FPP0 is enabled after power-on reset. The system initialization will be started from FPP0 and FPP1 unit can be enabled by user’s program if necessary. Both FPP0 and FPP1 can be enabled or disabled by using any one FPP unit. Program Counter 0 Stack Pointer 0 Accumulator 0 Flag register 0 FPP0 Program Counter 1 Stack Pointer 1 Accumulator 1 Flag register 1 FPP1 2KW OTP Program Memory 160 bytes SRAM IO Port Task Switch System Clock Time FPP0 active FPP1 active Mth (M+1)th (M-1)th Nth (N+1)th (N-1)th |
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