PMS232 datasheet(64/94 Pages) PADAUK

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PMC232/PMS232 Series

12-bit ADC Enhanced FPPA

8-bit OTP Controller

Page 64 of 94

PDK-DS-PMx232_V104– Dec. 18, 2018

6-12. Port A Digital Input Enable Register (padier), IO address = 0x0d

Bit

Reset

R/W

Description

Enable PA7 digital input and wake-up event.

1 / 0 : enable / disable.

This bit should be set to low to prevent leakage current when external crystal oscillator is

used. If this bit is set to low, PA7 can NOT be used to wake-up the system.

Note: For ICE emulation, the function is disabled when this bit is “1” and “0” is enabled.

Enable PA6 digital input and wake-up event.

1 / 0 : enable / disable.

This bit should be set to low to prevent leakage current when external crystal oscillator is

used. If this bit is set to low, PA6 can NOT be used to wake-up the system.

Note: For ICE emulation, the function is disabled when this bit is “1” and “0” is enabled.

Enable PA5 wake-up event.

1 / 0 : enable / disable.

This bit can be set to low to disable wake-up from PA5 toggling.

Note: For ICE emulation, wakeup is disabled when this bit is “1” and “0” is enabled.

Enable PA4 digital input and wake-up event.

1 / 0 : enable / disable.

This bit should be set to low when PA4 is assigned as AD input to prevent leakage

current. If this bit is set to low, PA4 can NOT be used to wake-up the system.

Note: For ICE emulation, the function is disabled when this bit is “1” and “0” is enabled.

Enable PA3 digital input and wake-up event.

1 / 0 : enable / disable.

This bit should be set to low when PA3 is assigned as AD input to prevent leakage

current. If this bit is set to low, PA3 can NOT be used to wake-up the system.

Note: For ICE emulation, the function is disabled when this bit is “1” and “0” is enabled.

Enable PA2 wake-up event.

1 / 0 : enable / disable.

This bit can be set to low to disable wake-up from PA2 toggling.

Note: For ICE emulation, wakeup is disabled when this bit is “1” and “0” is enabled.

Reserved

Enable PA0 wake-up event and interrupt request.

1 / 0 : enable / disable.

This bit can be set to low to disable wake-up from PA0 toggling and interrupt request from

this pin.

Note: For ICE emulation, the function is disabled when this bit is “1” and “0” is enabled.

6-13. Port B Digital Input Enable Register (pbdier), IO address = 0x0e

Bit

Reset

R/W

Description

Reserved

6 - 0

0x6F

Enable PB6~PB0 digital input to prevent leakage when the pin is assigned for AD input.

When disable is selected, the wakeup function from this pin is also disabled.

0 / 1 : disable / enable

Note: For ICE emulation, the function is disabled when this bit is “1” and “0” is enabled.

6-14. Port A Data Register (pa), IO address = 0x10

Bit

Reset

R/W

Description

7 - 0

0x00

R/W

Data register for Port A.

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