PMS232 datasheet(94/94 Pages) PADAUK

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PMC232/PMS232 Series

12-bit ADC Enhanced FPPA

8-bit OTP Controller

Page 94 of 94

PDK-DS-PMx232_V104– Dec. 18, 2018

(2)

Emulating PMC232/PMS232(SOP20/DIP20) : Use cable labeled CN7:P232CS20/CD20 to connect CN7

connector on ICE PDK3S-I-001/002/003. Connection is shown as below:

9-3-2. Important Notice for ICE operation

(1) When ICE PDK3S-I-001/002/003 emulates LCD 1/2 VDD function of PMC232/PMS232 series IC, the PC5

as COM1 for 1/2 VDD function of PMC232/PMS232 series IC requires jumping wire for adding 5.1K pull-up

and down resistance.

(2) ICE PDK3S-I-001/002/003 does not support emulating below IC functions of PMC232/PMS232 series from

(a) to (g). Thus, user needs to take PMC232/PMS232 Real Chip for test. Please notice：In order to avoid

the problems on difference between ICE and Real Chip test procedure, those functions will be temporarily

removed from datasheet before ICE is set to support them. PMC232/PMS232 Real Chip is defaulted with

these functions and performing ordinarily. User is recommended to consider these exceptions and careful

handle whenever doing the test.

(a) PMC232/PMS232 series IC is able to set LVR minimum to 1.8V, total 8 stages 4.0V, 3.5V, 3.0V,

2.75V, 2.5V, 2.2V, 2.0V, 1.8V.

(b) PMC232/PMS232 series IC LVR function can be disabled by register (misc.2).

(d) PMC232/PMS232 series IC is able to be set as single core operating model.

(e) PMC232/PMS232 series IC supports VDD less than 4V, 3V, 2V voltage level detection and store

detecting result to internal register (rstst).

(f) PMC232/PMS232 series IC supports reset-source detection.

(g) Watch-dog series IC provides watch-dog time out function which is assigned by register misc[1:0]

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