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PMS232 bảng dữ liệu(PDF) 53 Page - PADAUK Technology.

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Giải thích chi tiết về linh kiện  12-bit ADC Enhanced
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PMS232 bảng dữ liệu(HTML) 53 Page - PADAUK Technology.

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PMC232/PMS232 Series
12-bit ADC Enhanced FPPA
TM
8-bit OTP Controller
©Copyright 2018, PADAUK Technology Co. Ltd
Page 53 of 94
PDK-DS-PMx232_V104– Dec. 18, 2018
5-12-3. Wake-up
After entering the Power-Down or Power-Save modes, the PMC232/PMS232 can be resumed to normal
operation by toggling IO pins, Timer interrupt is available for Power-Save mode ONLY. Table 7 shows the
differences in wake-up sources between STOPSYS and STOPEXE.
Differences in wake-up sources between STOPSYS and STOPEXE
IO Toggle
Timer Interrupt
STOPSYS
Yes
No
STOPEXE
Yes
Yes
Table 7: Differences in wake-up sources between Power-Save mode and Power-Down mode
When using the IO pins to wake-up the PMC232/PMS232, registers padier and pbdier should be properly
set to enable the wake-up function for every corresponding pin. The wake-up time for normal wake-up is
about 1024 ILRC clocks counting from wake-up event; fast wake-up can be selected to reduce the wake-up
time by misc register. For fast wake-up mechanism, the wake-up time is 128 system clocks from IO toggling
if STOPEXE was issued, and 128 system clocks plus oscillator (IHRC or ILRC) stable time from IO toggling
if STOPSYS was issued. The oscillator stable time is the time for IHRC or ILRC oscillator from power-on,
depending on which oscillator is used as system clock source. Please notice that the fast wake-up will turn
off automatically when EOSC is selected as the system clock.
Suspend mode
Wake-up
mode
System
clock
source
Wake-up time (tWUP)
from IO toggle
STOPEXE
suspend
fast
wake-up
IHRC or
ILRC
128 * TSYS,
Where TSYS is the time period of system clock
STOPSYS
suspend
fast
wake-up
IHRC
128 TSYS : MISC(0x20) / 8 TSYS:MISC(0x28)
STOPSYS
suspend
fast
wake-up
ILRC
128 TSYS + TSILRC;
Where TSILRC is the stable time of ILRC from
power-on.
STOPSYS or
STOPEXE
suspend
fast
wake-up
EOSC
1024 * TILRC,
Where TILRC is the clock period of ILRC
STOPEXE
suspend
normal
wake-up
Any one
1024 * TILRC,
Where TILRC is the clock period of ILRC
STOPSYS
suspend
normal
wake-up
Any one
1024 * TILRC,
Where TILRC is the clock period of ILRC
** Please notice that the clock source of watch-dog will be switched to system clock (for example: 4MHz)
when fast wakeup is enabled. Therefore, for fast wake-up, recommending turning off the watchdog timer
before enabling the fast wakeup. When wake-up, turning on the watchdog timer after disabling the fast
wakeup.



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