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TLE9461ES

Lite CAN SBC Family

High-Voltage Wake and Voltage Monitoring Input

Datasheet

Rev.1.1

2019-09-27

9.2

High-Voltage Wake Function

9.2.1

Functional Description

The wake input pin is edge-sensitive inputs with a switching threshold of typically 3V. Both transitions, High

to Low and Low to High, result in a signalization by the SBC. The signalization occurs either by triggering the

interrupt in SBC Normal Mode and SBC Stop Mode or by a wake-up of the device in SBC Sleep and SBC Fail-

Safe Mode.

Two different wake-up detection modes can be selected via SPI:

• Static Sense: WK inputs are always active

• Cyclic Sense: WK inputs are only active for a certain time period (see Chapter 5.2.1)

A filter time of 16µs is implemented to avoid an unintentional wake-up due to transients or EMI disturbances

in Static Sense configuration.

The filter time (tFWK1) is triggered by a level change crossing the switching threshold and a wake signal is

recognized if the input level does not cross again the threshold during the selected filter time.

Figure 26 shows a typical wake-up timing and filtering of transient pulses.

Figure 26 Wake-up Filter Timing for Static Sense

The wake-up capability of the WK pin can be enabled or disabled via SPI command in the WK_CTRL_1 register.

A wake-up event via the WK pin can always be read in the register WK_STAT_0 at the bit WK_WU.

The actual voltage level of the WK pin (Low or High) can always be read in SBC Normal and SBC Stop-, and Init

Mode in the register WK_LVL_STAT. During Cyclic Sense, the register shows the sampled levels of the

respective WK pin.

If FO/GPIO is configured as WK input in its alternative function (16µs static filter time), then the wake-up events

are signalled in the register WK_STAT_1.

VWK,th

VWK

tWK,f

No Wake Event

Wake Event

VWK,th

tWK,f

VINT

tINT

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