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TLE9461ES bảng dữ liệu(PDF) 32 Page - Infineon Technologies AG |
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TLE9461ES bảng dữ liệu(HTML) 32 Page - Infineon Technologies AG |
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32 / 140 page ![]() TLE9461ES Lite CAN SBC Family System Features Datasheet 32 Rev.1.1 2019-09-27 5.2 Wake Features The following wake sources are implemented in the device: • Static Sense: WK/VSENSE input and/or GPIO WK input are permanently active as a wake source, i.e WK_EN is set and/or FO/GPIO is enabled as wake input (see Chapter 9.2.2 & Chapter 11.1.3) • Cyclic Sense: WK/VSENSE input only active during On-time of Cyclic Sense period. Internal timer is activating GPIO HS during On-time for sensing the WK/VSENSE input (see Chapter 5.2.1) • Cyclic Wake: wake-up is controlled by internal timer, wake inputs are not used for Cyclic Wake (see Chapter 5.2.2) • CAN wake: Wake-up via CAN message, i.e. CAN wake-up pattern (WUP, see also Chapter 8) 5.2.1 Cyclic Sense The Cyclic Sense feature is intended to reduce the quiescent current of the device and the application. In the Cyclic Sense configuration, the GPIO (configured as high-side driver) is switched On periodically, controlled by TIMER_CTRL. The high-side switch supplies external circuitries e.g. switches and/or resistor arrays, which are connected to the wake input WK (see Figure 6). Any edge change of the WK/VSENSE input signal during the On-time of the Cyclic Sense period causes a wake-up. Depending on the SBC mode, either the INTN is pulled Low (SBC Normal Mode and Stop Mode) or the SBC is woken enabling the VCC1 (after SBC Sleep Mode). Figure 6 Cyclic Sense Working Principle Switching Circuitry Config. as HS GPIO FO/GPIO WK/ VSENSE SBC STATE MACHINE WK GPIO_CTRL TIMER_CTRL Period / On-Time Signal to uC INTN 10k 10k |
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