TNETV2501INPGF datasheet(165/197 Pages) TI1

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Electrical Specifications

165

December 2002 − Revised November 2008

SPRS206K

5.13 Parallel General-Purpose Input/Output (PGPIOx) Timings

Table 5−24 and Table 5−25 assume testing over recommended operating conditions (see Figure 5−27).

Table 5−24. PGPIO Pins Configured as Inputs Timing Requirements

NO.

MIN

MAX

UNIT

PG2

tsu(PGPIO–COH)

Setup time, PGPIOx input valid before CLKOUT high†

PG3

th(COH–PGPIO)

Hold time, PGPIOx input valid after CLKOUT high†

† In this case, CLKOUT reflects SYSCLK1. The CLKOUT Selection Register (CLKOUTSR) can be programmed to select SYSCLK1 as CLKOUT.

Table 5−25. PGPIO Pins Configured as Outputs Switching Characteristics

NO.

PARAMETER

MIN

MAX

UNIT

PG1

td(COH–PGPIO)

Delay time, CLKOUT high to PGPIOx output change†

† In this case, CLKOUT reflects SYSCLK1. The CLKOUT Selection Register (CLKOUTSR) can be programmed to select SYSCLK1 as CLKOUT.

PG1

PG2

PG3

CLKOUT

PGPIOx

Input Mode

PGPIOx

Output Mode

Figure 5−27. Parallel General-Purpose Input/Output (PGPIOx) Signal Timings

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