DA9061 datasheet(35/82 Pages) DIALOG

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DA9061

Entry level PMIC for applications requiring up to 6 A

Datasheet

Revision 3.2

01-Mar-2016

CFR0011-120-00 Rev 5

35 of 82

Switching regulators

6.7

DA9061 includes four step-down switching regulators operating at 3 MHz. All switching regulators

employ a synchronous topology with an internal NFET, thus eliminating the need for an external

Schottky diode. The output voltage can be set in 10 mV steps (20 mV steps for Buck2) and the

regulation accuracy is ±3 % over the whole operating temperature range. Static line and load

regulation are also considered in this accuracy.

The switching frequency (3 MHz) is high enough to warrant the use of a small 1.0 µH inductor. The

programming of the converter current limit depends on the coil parameters, as illustrated in Table 21.

Table 21: Buck current limit

Min. ISAT (mA)

Frequency (MHz)

Buck current limit (mA)

1750

1500

1460

1200

1180

950

940

750

Control

6.7.1

The buck can be enabled manually by writing directly to a control register, with an external signal

connected to GPI, see Section 6.3.1.1, or by assigning it to a power sequencer step, see

Section 6.9.2. Each buck converter features two voltage control registers

(VBUCK<x>_A/VBUCK<x>_B) which can be programmed with two different voltages. The active

setting can then be selected via a control bit (VBUCK<x>_SEL), via a GPI, see Section 6.3.1.1, or

automatically based on the power mode of DA9061.

Output voltage slewing

6.7.2

To limit in-rush current from the input supply, the buck converters can achieve a new output voltage

with controlled ramping. Ramping is achieved by stepping through all the VBUCK values between the

old and new settings, at a rate defined by SLEW_RATE. The actual output slew rate, in mV/µs, for a

particular buck converter is then defined by the minimum voltage step of that buck and the common

step time programmed in SLEW_RATE. During PFM mode, the negative slew rate is load dependent

and might be lower than the one mentioned above. An event E_DVC_RDY is triggered when all buck

converters have reached their target voltage.

Soft-start

6.7.3

The buck converter supports two options for starting up. The normal startup option ramps up the

power rail as fast as possible, typically within 1 ms. This implies a high in-rush current. The slow

startup is selected by setting BUCK_SLOWSTART, which increases the startup time and limits the

input current.

Active discharge

6.7.4

When switching off a buck converter the output rail can be actively discharged. This feature is

enabled by setting BUCK_ACTV_DISCHRG. The discharge is implemented by ramping down the

output voltage using DVC.

Peak current limit

6.7.5

All buck converters feature a programmable current limit (BUCK<x>_ILIM). The current limit protects

the inductor and the pass devices from excessive current. If the current limit is exceeded, the buck

continues to run normally but the duty cycle is limited.

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