PC87591L datasheet(393/437 Pages) NSC

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7.0 Device Specifications (Continued)

Revision 1.07

393

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7.6.5

GPIO Ports Timing

Symbol

Figure

Description

Reference Conditions

Min

Max

Unit

GPIO Input Timing

tINPs

140

Input setup time IOPA0-7,

IOPB0-7, IOPC0-7, IOPD0-

7, IOPE0-7, IOPF0-7,

IOPG0-7, IOPH0-7, IOPI0-7,

IOPJ0-7, IOPK0-7, IOPL0-4,

IOPM0-7, KBSIN0-71

1. When using the Schmitt input.

Before RE CLK

0.5 * tCLK

tINPh

140

Input hold time IOPA0-7,

IOPB0-7, IOPC0-7, IOPD0-

7, IOPE0-7, IOPF0-7,

IOPG0-7, IOPH0-7, IOPI0-7,

IOPJ0-7, IOPK0-7, IOPL0-4,

IOPM0-7, KBSIN0-71

After RE CLK

GPIO Output Timing

tOUTv

141

Output valid time

KBSOUT0-15, IOPA0-7,

IOPB0-7, IOPC0-7, IOPD0-

7, IOPF0-7, IOPG0-7,

IOPH0-7, IOPI0-7, IOPJ0-7,

IOPK0-7, IOPL0-4, IOPM0-7

After RE CLK

0.5 * tCLK

tOUTh

141

Output hold time KBSOUT0-

15, IOPA0-7, IOPB0-7,

IOPC0-7, IOPD0-7, IOPF0-

7, IOPG0-7, IOPH0-7,

IOPI0-7, IOPJ0-7, IOPK0-7,

IOPL0-4, IOPM0-7

After RE CLK

CLK

Px Input Signals

tINPs

tINPh

Data In

Py Input Signals

Pz Input Signals

Figure 140. Input Signal Timing for Input and I/O Port Signals

CLK

Px Output Signals

tOUTv

tOUTh

Data Out

Pw Output Signals

Pz Output Signals

Figure 141. Output Signal Timing for Output and I/O Port Signals

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