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PC87591L bảng dữ liệu(PDF) 382 Page - National Semiconductor (TI) |
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PC87591L bảng dữ liệu(HTML) 382 Page - National Semiconductor (TI) |
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382 / 437 page ![]() 7.0 Device Specifications (Continued) www.national.com 382 Revision 1.07 7.6 AC ELECTRICAL CHARACTERISTICS 7.6.1 AC Test Conditions Figure 124. AC Test Conditions, TA =0°Cto70°C, VSUP = 3.3V ±10% Notes: 1. VSUP is VDD, VCC, AVCC or VBAT, according to the power well of the pin. 2. CL = 50 pF for all output pins (this value includes both jig and oscilloscope capacitance). 3. S1 = Open for push-pull output pins. S1 = VSUP for high impedance to active low and active low to high impedance measurements. S1 = VSS for high impedance to active high and active high to high impedance measurements. RL = 1.0 KΩ The following abbreviations are used in Section 7.6: RE = Rising Edge FE = Falling Edge Definitions The timing specifications in this section refer to low- or high-level voltage, according to the specific buffer type (TTL or CMOS) on the rising or falling edges of all the signals, as illustrated in the following figures, unless specifically stated other- wise. Figure 125. CMOS Output Signals Specification Conventions Device Under Test 0.1 µf Input Output RL CL S1 Load Circuit (Notes 1, 2, 3) AC Testing Input, Output Waveform VSUP 2.4 0.4 2.0 0.8 Test Points 2.0 0.8 CLK SIG1 SIG2 VOH, VOHhd VOL, VOLhd VOH, VOHhd VOL, VOLhd tSIG1v tSIG1a Vcc * 0.3 Vcc * 0.7 2.0V 2.40V Vcc * 0.7 Vcc * 0.3 tSIG2h tSIG1h tSIG2v tSIG2a or tSIG1ia or tSIG2ia |
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