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PC87591L bảng dữ liệu(PDF) 374 Page - National Semiconductor (TI) |
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PC87591L bảng dữ liệu(HTML) 374 Page - National Semiconductor (TI) |
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374 / 437 page ![]() 7.0 Device Specifications (Continued) www.national.com 374 Revision 1.07 7.2 DC CHARACTERISTICS OF PINS BY I/O BUFFER TYPES The following tables summarize the DC characteristics of all device pins described in Chapter 2 on page 39. The character- istics describe the general I/O buffer types defined in Table 4 on page 41. For exceptions, see Section 7.2.9 on page 376. For the DC characteristics of the analog pins, see Section 7.4 on page 378. The DC characteristics of the system interface meet the PCI 2.1 3.3V DC signaling. 7.2.1 Input, CMOS Compatible with Schmitt Trigger Symbol: INCS 7.2.2 Input, PCI 3.3V Symbol: INPCI 7.2.3 Input, SMBus Compatible Symbol: INSM Symbol Parameter Conditions Min Max Unit VIH Input High Voltage 0.75 VSUP 1 1. VSUP is VDD or VCC, according to the power well of the input. 5.52 2. Not tested; guaranteed by design. V VIL Input Low Voltage −0.52 1.1 V VH Input Hysteresis 5003 3. Not tested; guaranteed by characterization. mV IIL Input Leakage Current 0 < VIN <VSUP ±14 4. Maximum 10 µA for all pins together. µA Symbol Parameter Conditions Min Max Unit VIH Input High Voltage 0.5 VDD VDD + 0.5 1 1. Not tested; guaranteed by design. V VIL Input Low Voltage −0.51 0.3 VDD V lIL 2 2. Input leakage current includes the output leakage of the bidirectional buffers with TRI-STATE outputs. Input Leakage Current 0 < VIN <VDD ±13 3. Maximum 10 µA for all pins together. µA Symbol Parameter Conditions Min Max Unit VIH Input High Voltage 1.4 5.51 1. Not tested; guaranteed by design. V VIL Input Low Voltage −0.5 1 0.8 V IIL 2 2. Input leakage current includes the output leakage of the bidirectional buffers with TRI-STATE outputs. Input Leakage Current 0 < VIN <VDD ±13 3. Maximum 10 µA for all pins together. µA |
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