PC87591L datasheet(276/437 Pages) NSC

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Embedded Controller Modules (Continued)

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Revision 1.07

Debug Freeze Enable Register (DBGFRZEN)

The DBGFRZEN register enables the freeze operation to be performed on specific modules during debug. When the rele-

vant bit is set, it enables the freeze of activities in the respective module when both FREEZE and ON are set in DBGCFG

Location: 00 FF1816

Type: R/W

Bit

76543210

Name

Reserved

HIFEN

USARTFEN

ACB2FEN

ACB1FEN

MFT2FEN

MFT1FEN

Reset

11111111

Bit

Description

MFT1FEN (MFT16 1 Freeze Enable).

0: FREEZE in DBGCFG register has no effect on the MFT16 1

1: Freezes the MFT16 1 when FREEZE is set

MFT2FEN (MFT16 2 Freeze Enable).

0: FREEZE in DBGCFG register has no effect on the MFT16 2

1: Freezes the MFT16 2 when FREEZE is set

ACB1FEN (ACB1 Freeze Enable).

0: FREEZE in DBGCFG register has no effect on the ACB 1 interface

1: Freezes the ACB 1 interface when FREEZE is set

ACB2FEN (ACB2 Freeze Enable).

0: FREEZE in DBGCFG register has no effect on the ACB 2 interface

1: Freezes the ACB 2 interface when FREEZE is set

USARTFEN (USART Freeze Enable).

0: FREEZE in DBGCFG register has no effect on the USART interface

1: Freezes the USART interface when FREEZE is set

HIFEN (Host Interface Freeze Enable).

0: FREEZE in DBGCFG register has no effect on the Host Interface module

1: Freezes the Host interface when FREEZE is set

7-6

Reserved.

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