CP3SP33SMSSLASHNOPB datasheet(244/407 Pages) TI1

244 / 407 page

Slot 1

1/(8 kHz) = 125 us Frame

Slot 0

SFS

SRCLK

(SFS1)

STD/SRD

Data from/to

Codec 1

Data from/to

Codec 2

Slot 2

Slot 3

DS372

High Impedance

Frame Sync

for Codec 2

Frame Sync

for Codec 1

CP3SP33

MSM7717

SFS

XSYNC

SCK

BCLK

DS371

STD

PCMIN

SRCLK/SFS1

RSYNC

SRD

PCMOUT

MSM7717

XSYNC

BCLK

PCMIN

RSYNC

PCMOUT

CP3SP33

SNOSCW5 – MAY 2013

www.ti.com

Figure 24-11. Interface to Two External Codecs

Figure 24-12. Codec Data on Two Slots

25 I

2S Interface

The Inter-IC Sound (I2S) bus is a popular 3-wire serial bus for interface to audio chips, such as codecs.

This is a simple data interface, without any form of address or device selection. On an I2S bus, there is

only one bus master and one transmitter, but the master is not necessarily a transmitter or a receiver. The

master may be a transmitter, a receiver, or a controller for data transfers between other devices acting as

transmitter and receiver. In high-quality audio applications involving a codec, the codec is typically the

master so that it has precise control over the I2S bus clock.

The I2S bus carries two channels, left and right, which are typically used to carry stereo audio data

streams. The data alternates between left and right channels, as controlled by a word select signal driven

by the bus master.

244

I2S Interface

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